From 56e86c626df3dbf74c1021210636a7c5d92a49ce Mon Sep 17 00:00:00 2001 From: Dominik Sliwa Date: Tue, 30 Oct 2018 16:31:29 +0100 Subject: move to cmake Signed-off-by: Dominik Sliwa --- app/include/FreeRTOSConfig.h | 197 +++++++++++++++++++++++++++++++++++++++ app/include/adc_task.h | 20 ++++ app/include/apalis-tk1-k20-api.h | 123 ++++++++++++++++++++++++ app/include/can_task.h | 22 +++++ app/include/com_task.h | 45 +++++++++ app/include/gpio_ext.h | 22 +++++ 6 files changed, 429 insertions(+) create mode 100644 app/include/FreeRTOSConfig.h create mode 100644 app/include/adc_task.h create mode 100644 app/include/apalis-tk1-k20-api.h create mode 100644 app/include/can_task.h create mode 100644 app/include/com_task.h create mode 100644 app/include/gpio_ext.h (limited to 'app/include') diff --git a/app/include/FreeRTOSConfig.h b/app/include/FreeRTOSConfig.h new file mode 100644 index 0000000..91e561f --- /dev/null +++ b/app/include/FreeRTOSConfig.h @@ -0,0 +1,197 @@ +/* + FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. + + *************************************************************************** + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + *************************************************************************** + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available on the following + link: http://www.freertos.org/a00114.html + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that is more than just the market leader, it * + * is the industry's de facto standard. * + * * + * Help yourself get started quickly while simultaneously helping * + * to support the FreeRTOS project by purchasing a FreeRTOS * + * tutorial book, reference manual, or both: * + * http://www.FreeRTOS.org/Documentation * + * * + *************************************************************************** + + http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading + the FAQ page "My application does not run, what could be wrong?". Have you + defined configASSERT()? + + http://www.FreeRTOS.org/support - In return for receiving this top quality + embedded software for free we request you assist our global community by + participating in the support forum. + + http://www.FreeRTOS.org/training - Investing in training allows your team to + be as productive as possible as early as possible. Now you can receive + FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers + Ltd, and the world's leading authority on the world's leading RTOS. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. + Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. + + http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High + Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and commercial middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +#define configUSE_PREEMPTION 1 +#define configUSE_TICKLESS_IDLE 0 +#define configCPU_CLOCK_HZ (SystemCoreClock) +#define configTICK_RATE_HZ ((TickType_t)1000) +#define configMAX_PRIORITIES 5 +#define configMINIMAL_STACK_SIZE ((unsigned short)90) +#define configMAX_TASK_NAME_LEN 20 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_TASK_NOTIFICATIONS 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configUSE_ALTERNATIVE_API 0 /* Deprecated! */ +#define configQUEUE_REGISTRY_SIZE 8 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 5 +#define configUSE_APPLICATION_TASK_TAG 0 + +/* Memory allocation related definitions. */ +#define configSUPPORT_STATIC_ALLOCATION 0 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 +#define configTOTAL_HEAP_SIZE ((size_t)(10240)) +#define configAPPLICATION_ALLOCATED_HEAP 0 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configCHECK_FOR_STACK_OVERFLOW 0 +#define configUSE_MALLOC_FAILED_HOOK 0 +#define configUSE_DAEMON_TASK_STARTUP_HOOK 0 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configUSE_TRACE_FACILITY 1 +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine related definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY 2 +#define configTIMER_QUEUE_LENGTH 10 +#define configTIMER_TASK_STACK_DEPTH (configMINIMAL_STACK_SIZE * 2) + +/* Define to trap errors during development. */ +//#define configASSERT(x) if((x) == 0) {taskDISABLE_INTERRUPTS(); for (;;);} + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_xResumeFromISR 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 1 +#define INCLUDE_xTimerPendFunctionCall 1 +#define INCLUDE_xTaskAbortDelay 0 +#define INCLUDE_xTaskGetHandle 0 +#define INCLUDE_xTaskResumeFromISR 1 + +#ifdef __NVIC_PRIO_BITS +/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */ +#define configPRIO_BITS __NVIC_PRIO_BITS +#else +#define configPRIO_BITS 4 /* 15 priority levels */ +#endif + +/* The lowest interrupt priority that can be used in a call to a "set priority" +function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1U << (configPRIO_BITS)) - 1) + +/* The highest interrupt priority that can be used by any interrupt service +routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL +INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER +PRIORITY THAN THIS! (higher priorities are lower numeric values. */ +#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5 + +/* Interrupt priorities used by the kernel port layer itself. These are generic +to all Cortex-M ports, and do not rely on any particular library functions. */ +#define configKERNEL_INTERRUPT_PRIORITY (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) +/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! +See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) + +/* Normal assert() semantics without relying on the provision of an assert.h +header file. */ +#define configASSERT(x) \ + if ((x) == 0) \ + { \ + taskDISABLE_INTERRUPTS(); \ + for (;;) \ + ; \ + } + +/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS +standard names. */ +#define vPortSVCHandler SVC_Handler +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler + +#endif /* FREERTOS_CONFIG_H */ diff --git a/app/include/adc_task.h b/app/include/adc_task.h new file mode 100644 index 0000000..98a25aa --- /dev/null +++ b/app/include/adc_task.h @@ -0,0 +1,20 @@ +/* + * adc_task.h + * + */ + +#ifndef SOURCE_ADC_TASK_H_ +#define SOURCE_ADC_TASK_H_ +#include "board.h" +#include "fsl_dspi.h" + +#ifdef BOARD_USES_ADC +extern TaskHandle_t adc_task_handle; +extern TaskHandle_t tsc_task_handle; +void adc_task(void *pvParameters); +void tsc_task(void *pvParameters); +int adc_registers(dspi_transfer_t *spi_transfer); +int tsc_registers(dspi_transfer_t *spi_transfer); +#endif + +#endif /* SOURCE_ADC_TASK_H_ */ diff --git a/app/include/apalis-tk1-k20-api.h b/app/include/apalis-tk1-k20-api.h new file mode 100644 index 0000000..112a79b --- /dev/null +++ b/app/include/apalis-tk1-k20-api.h @@ -0,0 +1,123 @@ +/* + * Copyright 2016-2017 Toradex AG + * Dominik Sliwa + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ + +#ifndef __LINUX_MFD_APALIS_TK1_K20_API_H +#define __LINUX_MFD_APALIS_TK1_K20_API_H + +/* Commands and registers used in SPI communication */ + +/* Commands*/ +#define APALIS_TK1_K20_READ_INST 0x0F +#define APALIS_TK1_K20_WRITE_INST 0xF0 +#define APALIS_TK1_K20_BULK_WRITE_INST 0x3C +#define APALIS_TK1_K20_BULK_READ_INST 0xC3 + +#define APALIS_TK1_K20_MAX_BULK 250u +#define APALIS_TK1_K20_HEADER 4u + +/* General registers*/ +#define APALIS_TK1_K20_STAREG 0x00 /* general status register RO */ +#define APALIS_TK1_K20_REVREG 0x01 /* FW revision register RO*/ +#define APALIS_TK1_K20_IRQREG 0x02 /* IRQ status RO(reset of read) */ +#define APALIS_TK1_K20_CTRREG 0x03 /* general control register RW */ +#define APALIS_TK1_K20_MSQREG 0x04 /* IRQ mask register RW */ + +/* 0x05-0x0F Reserved */ + +/* CAN Registers */ +#define APALIS_TK1_K20_CANREG 0x10 /* CAN0 control & status register RW */ +#define APALIS_TK1_K20_CANREG_CLR 0x11 /* CAN0 CANREG clear register WO */ +#define APALIS_TK1_K20_CANERR 0x12 /* CAN0 error register RW */ +#define APALIS_TK1_K20_CAN_BAUD_REG 0x13 /* CAN0 baud set register RW */ +#define APALIS_TK1_K20_CAN_BIT_1 0x14 /* CAN0 bit timing register 1 RW */ +#define APALIS_TK1_K20_CAN_BIT_2 0x15 /* CAN0 bit timing register 2 RW */ +#define APALIS_TK1_K20_CAN_IN_BUF_CNT 0x16 /* CAN0 IN received data count RO */ +#define APALIS_TK1_K20_CAN_IN_BUF 0x17 /* CAN0 IN RO */ +/* buffer size is 13 bytes */ +#define APALIS_TK1_K20_CAN_IN_BUF_END 0x23 /* CAN0 IN RO */ +#define APALIS_TK1_K20_CAN_OUT_BUF 0x24 /* CAN0 OUT WO */ +/* buffer size is 13 bytes */ +#define APALIS_TK1_K20_CAN_OUT_BUF_END (APALIS_TK1_K20_CAN_OUT_BUF + 13 - 1)/* CAN OUT BUF END */ +#define APALIS_TK1_K20_CAN_OFFSET 0x30 +#define APALIS_TK1_K20_CAN_DEV_OFFSET(x) (x ? APALIS_TK1_K20_CAN_OFFSET : 0) + +/* 0x30-0x3F Reserved */ +/* 0x40-0x62 CAN1 registers same layout as CAN0 */ +/* 0x63-0x6F Reserved */ + +/* ADC Registers */ +#define APALIS_TK1_K20_ADCREG 0x70 /* ADC control & status register RW */ +#define APALIS_TK1_K20_ADC_CH0L 0x71 /* ADC Channel 0 LSB RO */ +#define APALIS_TK1_K20_ADC_CH0H 0x72 /* ADC Channel 0 MSB RO */ +#define APALIS_TK1_K20_ADC_CH1L 0x73 /* ADC Channel 1 LSB RO */ +#define APALIS_TK1_K20_ADC_CH1H 0x74 /* ADC Channel 1 MSB RO */ +#define APALIS_TK1_K20_ADC_CH2L 0x75 /* ADC Channel 2 LSB RO */ +#define APALIS_TK1_K20_ADC_CH2H 0x76 /* ADC Channel 2 MSB RO */ +#define APALIS_TK1_K20_ADC_CH3L 0x77 /* ADC Channel 3 LSB RO */ +#define APALIS_TK1_K20_ADC_CH3H 0x78 /* ADC Channel 3 MSB RO */ +/* Bulk read of LSB register can be use to read entire 16-bit in one command */ +/* Bulk read of APALIS_TK1_K20_ADC_CH0L register can be use to read all + * ADC channels in one command */ + +/* 0x79-0x7F reserved */ + +/* TSC Register */ +#define APALIS_TK1_K20_TSCREG 0x80 /* TSC control & status register RW */ +#define APALIS_TK1_K20_TSC_XML 0x81 /* TSC X- data LSB RO */ +#define APALIS_TK1_K20_TSC_XMH 0x82 /* TSC X- data MSB RO */ +#define APALIS_TK1_K20_TSC_XPL 0x83 /* TSC X+ data LSB RO */ +#define APALIS_TK1_K20_TSC_XPH 0x84 /* TSC X+ data MSB RO */ +#define APALIS_TK1_K20_TSC_YML 0x85 /* TSC Y- data LSB RO */ +#define APALIS_TK1_K20_TSC_YMH 0x86 /* TSC Y- data MSB RO */ +#define APALIS_TK1_K20_TSC_YPL 0x87 /* TSC Y+ data LSB RO */ +#define APALIS_TK1_K20_TSC_YPH 0x88 /* TSC Y+ data MSB RO */ +/* Bulk read of LSB register can be use to read entire 16-bit in one command */ +#define APALIS_TK1_K20_TSC_ENA BIT(0) +#define APALIS_TK1_K20_TSC_ENA_MASK BIT(0) + +/* 0x89-0x8F Reserved */ + +/* GPIO Registers */ +#define APALIS_TK1_K20_GPIOREG 0x90 /* GPIO control & status register RW */ +#define APALIS_TK1_K20_GPIO_NO 0x91 /* currently configured GPIO RW */ +#define APALIS_TK1_K20_GPIO_STA 0x92 /* Status register for the APALIS_TK1_K20_GPIO_NO GPIO RW */ +/* MSB | 0 ... 0 | VALUE | Output-1 / Input-0 | LSB */ +#define APALIS_TK1_K20_GPIO_STA_OE BIT(0) +#define APALIS_TK1_K20_GPIO_STA_VAL BIT(1) + +/* 0x93-0xFC Reserved */ +#define APALIS_TK1_K20_LAST_REG 0xFD +#define APALIS_TK1_K20_RET_REQ 0xFE +/* 0xFF Reserved */ + +/* Interrupt flags */ +#define APALIS_TK1_K20_GEN_IRQ 0 +#define APALIS_TK1_K20_CAN0_IRQ 1 +#define APALIS_TK1_K20_CAN1_IRQ 2 +#define APALIS_TK1_K20_ADC_IRQ 3 +#define APALIS_TK1_K20_TSC_IRQ 4 +#define APALIS_TK1_K20_GPIO_IRQ 5 + +#define APALIS_TK1_K20_FW_VER 0x12 +#define APALIS_TK1_K20_TESTER_FW_VER 0xFE + +#define FW_MINOR (APALIS_TK1_K20_FW_VER & 0x0F) +#define FW_MAJOR ((APALIS_TK1_K20_FW_VER & 0xF0) >> 4) + +#define TK1_K20_SENTINEL 0x55 +#define TK1_K20_INVAL 0xAA + +#define APALIS_TK1_K20_IRQ_REG_CNT 1 +#define APALIS_TK1_K20_IRQ_PER_REG 8 + +#define APALIS_TK1_CAN_CLK_UNIT 6250 + +#define APALIS_TK1_MAX_CAN_DMA_XREF 19u + +#endif /* ifndef __LINUX_MFD_APALIS_TK1_K20_API_H */ diff --git a/app/include/can_task.h b/app/include/can_task.h new file mode 100644 index 0000000..8934c0a --- /dev/null +++ b/app/include/can_task.h @@ -0,0 +1,22 @@ +/* + * can_task.h + */ + +#ifndef SOURCE_CAN_TASK_H_ +#define SOURCE_CAN_TASK_H_ + +/* FreeRTOS kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "fsl_dspi.h" + +extern TaskHandle_t can0_task_handle; +extern TaskHandle_t can1_task_handle; +extern TaskHandle_t can_tx_notify_task_handle; +void can0_task(void *pvParameters); +void can1_task(void *pvParameters); +void can_tx_notify_task(void *pvParameters); +int canx_registers(dspi_transfer_t *spi_transfer, int id); +void can_spi_read_complete(uint8_t id); + +#endif /* SOURCE_CAN_TASK_H_ */ diff --git a/app/include/com_task.h b/app/include/com_task.h new file mode 100644 index 0000000..a541f88 --- /dev/null +++ b/app/include/com_task.h @@ -0,0 +1,45 @@ +/* + * com_task.h + */ + +#ifndef COM_TASK_H_ +#define COM_TASK_H_ + +#include "board.h" +#include "fsl_debug_console.h" +#include "fsl_dspi.h" +#include "fsl_gpio.h" +#include "fsl_edma.h" +#include "fsl_dspi_edma.h" +#include "fsl_dmamux.h" +#include "apalis-tk1-k20-api.h" + +/* FreeRTOS kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "timers.h" +#include "semphr.h" +#include "errno.h" + +#define SPI_DMA + +typedef struct _callback_message_t +{ + status_t async_status; + SemaphoreHandle_t sem; +} callback_message_t; + +extern TaskHandle_t spi_task_handle; +void generate_irq(uint8_t irq); +void clear_irq_flag(uint8_t irq); +void spi_task(void *pvParameters); + +#define BIT(nr) (1UL << (nr)) +#define ADC0_CHANNEL_CNT 4 +#define TSC0_CHANNEL_CNT 4 +#define CAN_RX_BUF_SIZE 256 + +extern volatile uint8_t registers[APALIS_TK1_K20_LAST_REG]; + +#endif /* COM_TASK_H_ */ diff --git a/app/include/gpio_ext.h b/app/include/gpio_ext.h new file mode 100644 index 0000000..7fe800d --- /dev/null +++ b/app/include/gpio_ext.h @@ -0,0 +1,22 @@ +/* + * gpio_ext.h + * + */ + +#ifndef SOURCE_GPIO_EXT_H_ +#define SOURCE_GPIO_EXT_H_ + +#include "board.h" +#include "fsl_device_registers.h" +#include "fsl_debug_console.h" +#include "fsl_dspi.h" + +struct gpio_id{ + PORT_Type *port; + GPIO_Type *gpio; + uint32_t pin; +}; + +int gpio_registers(dspi_transfer_t *spi_transfer); + +#endif /* SOURCE_GPIO_EXT_H_ */ -- cgit v1.2.3