From a57cc2c988482010061b9e68344fdf1969889763 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Tue, 12 Jan 2016 14:06:54 -0800 Subject: initial commit, FreeRTOS_BSP_1.0.0_iMX7D --- .../MCIMX7D/linker/arm/MCIMX7D_M4_QSPIA.scf | 36 +++++ .../MCIMX7D/linker/arm/MCIMX7D_M4_QSPIB.scf | 36 +++++ .../devices/MCIMX7D/linker/arm/MCIMX7D_M4_tcm.scf | 36 +++++ .../devices/MCIMX7D/linker/gcc/MCIMX7D_M4_QSPIA.ld | 167 +++++++++++++++++++++ .../devices/MCIMX7D/linker/gcc/MCIMX7D_M4_QSPIB.ld | 167 +++++++++++++++++++++ .../devices/MCIMX7D/linker/gcc/MCIMX7D_M4_tcm.ld | 167 +++++++++++++++++++++ .../MCIMX7D/linker/iar/MCIMX7D_M4_QSPIA.icf | 93 ++++++++++++ .../MCIMX7D/linker/iar/MCIMX7D_M4_QSPIB.icf | 93 ++++++++++++ .../devices/MCIMX7D/linker/iar/MCIMX7D_M4_tcm.icf | 93 ++++++++++++ 9 files changed, 888 insertions(+) create mode 100755 platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_QSPIA.scf create mode 100755 platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_QSPIB.scf create mode 100755 platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_tcm.scf create mode 100644 platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_QSPIA.ld create mode 100644 platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_QSPIB.ld create mode 100644 platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_tcm.ld create mode 100644 platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_QSPIA.icf create mode 100644 platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_QSPIB.icf create mode 100644 platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_tcm.icf (limited to 'platform/devices/MCIMX7D/linker') diff --git a/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_QSPIA.scf b/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_QSPIA.scf new file mode 100755 index 0000000..a94eafb --- /dev/null +++ b/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_QSPIA.scf @@ -0,0 +1,36 @@ +#! armcc -E --cpu Cortex-M4 + +#define m_text_start 0x60000000 +#define m_text_size 0x7FF0 + +#define m_data_start 0x20000000 +#define m_data_size 0x7FF0 + +#define HEAP_SIZE 0x200 +#define STACK_SIZE 0x400 +#define MY_ALIGN(address, alignment) ((address + (alignment-1)) AND ~(alignment-1)) + + +LR_m_text m_text_start m_text_size +{ + ER_m_text m_text_start m_text_size { + * (RESET,+FIRST) + * (InRoot$$Sections) + .ANY (+RO) + } + + RW_m_data m_data_start { ; RW data + .ANY (+RW ) + } + ZI_m_data +0 { ; ZI data + .ANY (+ZI ) + } + + ARM_LIB_HEAP (m_data_start+m_data_size-HEAP_SIZE-STACK_SIZE) EMPTY HEAP_SIZE + { ; Heap region growing up + } + ARM_LIB_STACK (m_data_start+m_data_size) EMPTY -STACK_SIZE + { ; Stack region growing down + } + +} diff --git a/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_QSPIB.scf b/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_QSPIB.scf new file mode 100755 index 0000000..b7857af --- /dev/null +++ b/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_QSPIB.scf @@ -0,0 +1,36 @@ +#! armcc -E --cpu Cortex-M4 + +#define m_text_start 0x68000000 +#define m_text_size 0x7FF0 + +#define m_data_start 0x20000000 +#define m_data_size 0x7FF0 + +#define HEAP_SIZE 0x200 +#define STACK_SIZE 0x400 +#define MY_ALIGN(address, alignment) ((address + (alignment-1)) AND ~(alignment-1)) + + +LR_m_text m_text_start m_text_size +{ + ER_m_text m_text_start m_text_size { + * (RESET,+FIRST) + * (InRoot$$Sections) + .ANY (+RO) + } + + RW_m_data m_data_start { ; RW data + .ANY (+RW ) + } + ZI_m_data +0 { ; ZI data + .ANY (+ZI ) + } + + ARM_LIB_HEAP (m_data_start+m_data_size-HEAP_SIZE-STACK_SIZE) EMPTY HEAP_SIZE + { ; Heap region growing up + } + ARM_LIB_STACK (m_data_start+m_data_size) EMPTY -STACK_SIZE + { ; Stack region growing down + } + +} diff --git a/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_tcm.scf b/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_tcm.scf new file mode 100755 index 0000000..95a4dda --- /dev/null +++ b/platform/devices/MCIMX7D/linker/arm/MCIMX7D_M4_tcm.scf @@ -0,0 +1,36 @@ +#! armcc -E --cpu Cortex-M4 + +#define m_text_start 0x1FFF8000 +#define m_text_size 0x7FF0 + +#define m_data_start 0x20000000 +#define m_data_size 0x7FF0 + +#define HEAP_SIZE 0x200 +#define STACK_SIZE 0x400 +#define MY_ALIGN(address, alignment) ((address + (alignment-1)) AND ~(alignment-1)) + + +LR_m_text m_text_start m_text_size +{ + ER_m_text m_text_start m_text_size { + * (RESET,+FIRST) + * (InRoot$$Sections) + .ANY (+RO) + } + + RW_m_data m_data_start { ; RW data + .ANY (+RW ) + } + ZI_m_data +0 { ; ZI data + .ANY (+ZI ) + } + + ARM_LIB_HEAP (m_data_start+m_data_size-HEAP_SIZE-STACK_SIZE) EMPTY HEAP_SIZE + { ; Heap region growing up + } + ARM_LIB_STACK (m_data_start+m_data_size) EMPTY -STACK_SIZE + { ; Stack region growing down + } + +} diff --git a/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_QSPIA.ld b/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_QSPIA.ld new file mode 100644 index 0000000..5b5ec1a --- /dev/null +++ b/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_QSPIA.ld @@ -0,0 +1,167 @@ +/* Entry Point */ +ENTRY(Reset_Handler) + +STACK_SIZE = 0x400; +HEAP_SIZE = 0x200; +/* Specify the memory areas */ +MEMORY +{ + m_text (RX) : ORIGIN = 0x60000000, LENGTH = 0x00007FFF + + m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00007FFF + +} + +SECTIONS +{ + .interrupts : + { + __VECTOR_TABLE = .; + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_text + + __VECTOR_RAM = __VECTOR_TABLE; + __RAM_VECTOR_TABLE_SIZE_BYTES = 0x0; + + + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + } > m_text + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > m_text + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + .ctors : + { + __CTOR_LIST__ = .; + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } > m_text + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } > m_text + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > m_text + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } > m_text + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > m_text + + __etext = .; /* define a global symbol at end of code */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization */ + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*(.jcr*)) + . = ALIGN(4); + __data_end__ = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); + + /* Uninitialized data section */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > m_data + + .heap : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + } > m_data + .stack : + { + . = ALIGN(8); + . += STACK_SIZE; + } > m_data + /* Initializes stack on the end of block */ + __StackTop = ORIGIN(m_data) + LENGTH(m_data); + __StackLimit = __StackTop - STACK_SIZE; + PROVIDE(__stack = __StackTop); + .ARM.attributes 0 : { *(.ARM.attributes) } + + ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") + } diff --git a/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_QSPIB.ld b/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_QSPIB.ld new file mode 100644 index 0000000..84dceb5 --- /dev/null +++ b/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_QSPIB.ld @@ -0,0 +1,167 @@ +/* Entry Point */ +ENTRY(Reset_Handler) + +STACK_SIZE = 0x400; +HEAP_SIZE = 0x200; +/* Specify the memory areas */ +MEMORY +{ + m_text (RX) : ORIGIN = 0x68000000, LENGTH = 0x00007FFF + + m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00007FFF + +} + +SECTIONS +{ + .interrupts : + { + __VECTOR_TABLE = .; + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_text + + __VECTOR_RAM = __VECTOR_TABLE; + __RAM_VECTOR_TABLE_SIZE_BYTES = 0x0; + + + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + } > m_text + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > m_text + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + .ctors : + { + __CTOR_LIST__ = .; + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } > m_text + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } > m_text + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > m_text + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } > m_text + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > m_text + + __etext = .; /* define a global symbol at end of code */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization */ + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*(.jcr*)) + . = ALIGN(4); + __data_end__ = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); + + /* Uninitialized data section */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > m_data + + .heap : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + } > m_data + .stack : + { + . = ALIGN(8); + . += STACK_SIZE; + } > m_data + /* Initializes stack on the end of block */ + __StackTop = ORIGIN(m_data) + LENGTH(m_data); + __StackLimit = __StackTop - STACK_SIZE; + PROVIDE(__stack = __StackTop); + .ARM.attributes 0 : { *(.ARM.attributes) } + + ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") + } diff --git a/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_tcm.ld b/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_tcm.ld new file mode 100644 index 0000000..5fd3435 --- /dev/null +++ b/platform/devices/MCIMX7D/linker/gcc/MCIMX7D_M4_tcm.ld @@ -0,0 +1,167 @@ +/* Entry Point */ +ENTRY(Reset_Handler) + +STACK_SIZE = 0x400; +HEAP_SIZE = 0x200; +/* Specify the memory areas */ +MEMORY +{ + m_text (RX) : ORIGIN = 0x1FFF8000, LENGTH = 0x00007FFF + + m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00007FFF + +} + +SECTIONS +{ + .interrupts : + { + __VECTOR_TABLE = .; + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_text + + __VECTOR_RAM = __VECTOR_TABLE; + __RAM_VECTOR_TABLE_SIZE_BYTES = 0x0; + + + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + } > m_text + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > m_text + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + .ctors : + { + __CTOR_LIST__ = .; + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } > m_text + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } > m_text + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > m_text + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } > m_text + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > m_text + + __etext = .; /* define a global symbol at end of code */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization */ + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*(.jcr*)) + . = ALIGN(4); + __data_end__ = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); + + /* Uninitialized data section */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > m_data + + .heap : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + } > m_data + .stack : + { + . = ALIGN(8); + . += STACK_SIZE; + } > m_data + /* Initializes stack on the end of block */ + __StackTop = ORIGIN(m_data) + LENGTH(m_data); + __StackLimit = __StackTop - STACK_SIZE; + PROVIDE(__stack = __StackTop); + .ARM.attributes 0 : { *(.ARM.attributes) } + + ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") + } \ No newline at end of file diff --git a/platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_QSPIA.icf b/platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_QSPIA.icf new file mode 100644 index 0000000..f2294ec --- /dev/null +++ b/platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_QSPIA.icf @@ -0,0 +1,93 @@ +/* +** ################################################################### +** Processors: MCIMX7D7DVK10SA +** MCIMX7D7DVM10SA +** MCIMX7D3DVK10SA +** MCIMX7D3EVM10SA +** +** Compiler: IAR ANSI C/C++ Compiler for ARM +** Reference manual: IMX7DRM, Rev.A, February 2015 +** Version: rev. 1.0, 2015-05-19 +** +** Abstract: +** Linker file for the IAR ANSI C/C++ Compiler for ARM +** +** Copyright (c) 2015 Freescale Semiconductor, Inc. +** All rights reserved. +** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** +** o Redistributions of source code must retain the above copyright notice, this list +** of conditions and the following disclaimer. +** +** o Redistributions in binary form must reproduce the above copyright notice, this +** list of conditions and the following disclaimer in the documentation and/or +** other materials provided with the distribution. +** +** o Neither the name of Freescale Semiconductor, Inc. nor the names of its +** contributors may be used to endorse or promote products derived from this +** software without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** http: www.freescale.com +** mail: support@freescale.com +** +** ################################################################### +*/ + +define symbol m_interrupts_start = 0x60000000; +define symbol m_interrupts_end = 0x6000023F; + +define symbol m_text_start = 0x60000240; +define symbol m_text_end = 0x60007FFF; + +define symbol m_data_start = 0x20000000; +define symbol m_data_end = 0x20007FFF; + + +/* Sizes */ +if (isdefinedsymbol(__stack_size__)) { + define symbol __size_cstack__ = __stack_size__; +} else { + define symbol __size_cstack__ = 0x0400; +} + +if (isdefinedsymbol(__heap_size__)) { + define symbol __size_heap__ = __heap_size__; +} else { + define symbol __size_heap__ = 0x0400; +} + +define exported symbol __VECTOR_TABLE = m_interrupts_start; + +define memory mem with size = 4G; +define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end] + | mem:[from m_text_start to m_text_end]; +define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__]; +define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end]; + +define block CSTACK with alignment = 8, size = __size_cstack__ { }; +define block HEAP with alignment = 8, size = __size_heap__ { }; +define block RW { readwrite }; +define block ZI { zi }; + +initialize by copy { readwrite, section .textrw }; +do not initialize { section .noinit }; + +place at address mem: m_interrupts_start { readonly section .intvec }; +place in TEXT_region { readonly }; +place in DATA_region { block RW }; +place in DATA_region { block ZI }; +place in DATA_region { last block HEAP }; +place in CSTACK_region { block CSTACK }; diff --git a/platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_QSPIB.icf b/platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_QSPIB.icf new file mode 100644 index 0000000..cc0930e --- /dev/null +++ b/platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_QSPIB.icf @@ -0,0 +1,93 @@ +/* +** ################################################################### +** Processors: MCIMX7D7DVK10SA +** MCIMX7D7DVM10SA +** MCIMX7D3DVK10SA +** MCIMX7D3EVM10SA +** +** Compiler: IAR ANSI C/C++ Compiler for ARM +** Reference manual: IMX7DRM, Rev.A, February 2015 +** Version: rev. 1.0, 2015-05-19 +** +** Abstract: +** Linker file for the IAR ANSI C/C++ Compiler for ARM +** +** Copyright (c) 2015 Freescale Semiconductor, Inc. +** All rights reserved. +** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** +** o Redistributions of source code must retain the above copyright notice, this list +** of conditions and the following disclaimer. +** +** o Redistributions in binary form must reproduce the above copyright notice, this +** list of conditions and the following disclaimer in the documentation and/or +** other materials provided with the distribution. +** +** o Neither the name of Freescale Semiconductor, Inc. nor the names of its +** contributors may be used to endorse or promote products derived from this +** software without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** http: www.freescale.com +** mail: support@freescale.com +** +** ################################################################### +*/ + +define symbol m_interrupts_start = 0x68000000; +define symbol m_interrupts_end = 0x6800023F; + +define symbol m_text_start = 0x68000240; +define symbol m_text_end = 0x68007FFF; + +define symbol m_data_start = 0x20000000; +define symbol m_data_end = 0x20007FFF; + + +/* Sizes */ +if (isdefinedsymbol(__stack_size__)) { + define symbol __size_cstack__ = __stack_size__; +} else { + define symbol __size_cstack__ = 0x0400; +} + +if (isdefinedsymbol(__heap_size__)) { + define symbol __size_heap__ = __heap_size__; +} else { + define symbol __size_heap__ = 0x0400; +} + +define exported symbol __VECTOR_TABLE = m_interrupts_start; + +define memory mem with size = 4G; +define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end] + | mem:[from m_text_start to m_text_end]; +define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__]; +define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end]; + +define block CSTACK with alignment = 8, size = __size_cstack__ { }; +define block HEAP with alignment = 8, size = __size_heap__ { }; +define block RW { readwrite }; +define block ZI { zi }; + +initialize by copy { readwrite, section .textrw }; +do not initialize { section .noinit }; + +place at address mem: m_interrupts_start { readonly section .intvec }; +place in TEXT_region { readonly }; +place in DATA_region { block RW }; +place in DATA_region { block ZI }; +place in DATA_region { last block HEAP }; +place in CSTACK_region { block CSTACK }; diff --git a/platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_tcm.icf b/platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_tcm.icf new file mode 100644 index 0000000..04d9c21 --- /dev/null +++ b/platform/devices/MCIMX7D/linker/iar/MCIMX7D_M4_tcm.icf @@ -0,0 +1,93 @@ +/* +** ################################################################### +** Processors: MCIMX7D7DVK10SA +** MCIMX7D7DVM10SA +** MCIMX7D3DVK10SA +** MCIMX7D3EVM10SA +** +** Compiler: IAR ANSI C/C++ Compiler for ARM +** Reference manual: IMX7DRM, Rev.A, February 2015 +** Version: rev. 1.0, 2015-05-19 +** +** Abstract: +** Linker file for the IAR ANSI C/C++ Compiler for ARM +** +** Copyright (c) 2015 Freescale Semiconductor, Inc. +** All rights reserved. +** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** +** o Redistributions of source code must retain the above copyright notice, this list +** of conditions and the following disclaimer. +** +** o Redistributions in binary form must reproduce the above copyright notice, this +** list of conditions and the following disclaimer in the documentation and/or +** other materials provided with the distribution. +** +** o Neither the name of Freescale Semiconductor, Inc. nor the names of its +** contributors may be used to endorse or promote products derived from this +** software without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** http: www.freescale.com +** mail: support@freescale.com +** +** ################################################################### +*/ + +define symbol m_interrupts_start = 0x1FFF8000; +define symbol m_interrupts_end = 0x1FFF823F; + +define symbol m_text_start = 0x1FFF8240; +define symbol m_text_end = 0x1FFFFFFF; + +define symbol m_data_start = 0x20000000; +define symbol m_data_end = 0x20007FFF; + +/* Sizes */ +if (isdefinedsymbol(__stack_size__)) { + define symbol __size_cstack__ = __stack_size__; +} else { + define symbol __size_cstack__ = 0x0400; +} + +if (isdefinedsymbol(__heap_size__)) { + define symbol __size_heap__ = __heap_size__; +} else { + define symbol __size_heap__ = 0x0400; +} + +define exported symbol __VECTOR_TABLE = m_interrupts_start; + +define memory mem with size = 4G; +define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end] + | mem:[from m_text_start to m_text_end]; +define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__]; +define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end]; + +define block CSTACK with alignment = 8, size = __size_cstack__ { }; +define block HEAP with alignment = 8, size = __size_heap__ { }; +define block RW { readwrite }; +define block ZI { zi }; + +initialize by copy { readwrite, section .textrw }; +do not initialize { section .noinit }; + +place at address mem: m_interrupts_start { readonly section .intvec }; +place in TEXT_region { readonly }; +place in DATA_region { block RW }; +place in DATA_region { block ZI }; +place in DATA_region { last block HEAP }; +place in CSTACK_region { block CSTACK }; + -- cgit v1.2.3