1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
|
/*
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "fsl_dspi_freertos.h"
static void DSPI_RTOS_Callback(SPI_Type *base, dspi_master_handle_t *drv_handle, status_t status, void *userData)
{
dspi_rtos_handle_t *handle = (dspi_rtos_handle_t *)userData;
BaseType_t reschedule;
xSemaphoreGiveFromISR(handle->event, &reschedule);
portYIELD_FROM_ISR(reschedule);
}
status_t DSPI_RTOS_Init(dspi_rtos_handle_t *handle,
SPI_Type *base,
const dspi_master_config_t *masterConfig,
uint32_t srcClock_Hz)
{
if (handle == NULL)
{
return kStatus_InvalidArgument;
}
if (base == NULL)
{
return kStatus_InvalidArgument;
}
memset(handle, 0, sizeof(dspi_rtos_handle_t));
#if (configSUPPORT_STATIC_ALLOCATION == 1)
handle->mutex = xSemaphoreCreateMutexStatic(&handle->mutexBuffer);
#else
handle->mutex = xSemaphoreCreateMutex();
#endif
if (handle->mutex == NULL)
{
return kStatus_Fail;
}
#if (configSUPPORT_STATIC_ALLOCATION == 1)
handle->event = xSemaphoreCreateBinaryStatic(&handle->semaphoreBuffer);
#else
handle->event = xSemaphoreCreateBinary();
#endif
if (handle->event == NULL)
{
vSemaphoreDelete(handle->mutex);
return kStatus_Fail;
}
handle->base = base;
DSPI_MasterInit(handle->base, masterConfig, srcClock_Hz);
DSPI_MasterTransferCreateHandle(handle->base, &handle->drv_handle, DSPI_RTOS_Callback, (void *)handle);
return kStatus_Success;
}
status_t DSPI_RTOS_Deinit(dspi_rtos_handle_t *handle)
{
DSPI_Deinit(handle->base);
vSemaphoreDelete(handle->event);
vSemaphoreDelete(handle->mutex);
return kStatus_Success;
}
status_t DSPI_RTOS_Transfer(dspi_rtos_handle_t *handle, dspi_transfer_t *transfer)
{
status_t status;
/* Lock resource mutex */
if (xSemaphoreTake(handle->mutex, portMAX_DELAY) != pdTRUE)
{
return kStatus_DSPI_Busy;
}
status = DSPI_MasterTransferNonBlocking(handle->base, &handle->drv_handle, transfer);
if (status != kStatus_Success)
{
xSemaphoreGive(handle->mutex);
return status;
}
/* Wait for transfer to finish */
xSemaphoreTake(handle->event, portMAX_DELAY);
/* Unlock resource mutex */
xSemaphoreGive(handle->mutex);
/* Return status captured by callback function */
return handle->async_status;
}
|
