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| author | danh-arm <dan.handley@arm.com> | 2016-01-25 11:02:13 +0000 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2016-01-25 11:02:13 +0000 |
| commit | 01fc3f7300e86b0b672977133c3028d638d0c672 (patch) | |
| tree | 8b3a5f0c663036334933ca888e88fad42702480d | |
| parent | 84091c48167c3335c826b31c96c67a6e8ae7eeba (diff) | |
| parent | 0e5dcdd254ef24d9d7ff9587e65dcc34d21c190e (diff) | |
Merge pull request #495 from jcastillo-arm/jc/tf-issues/170
ARM plat: add build option to unlock access to non-secure timer
| -rw-r--r-- | docs/user-guide.md | 6 | ||||
| -rw-r--r-- | plat/arm/common/aarch64/arm_common.c | 2 | ||||
| -rw-r--r-- | plat/arm/common/arm_common.mk | 5 |
3 files changed, 13 insertions, 0 deletions
diff --git a/docs/user-guide.md b/docs/user-guide.md index 3337f88d..894d69bd 100644 --- a/docs/user-guide.md +++ b/docs/user-guide.md @@ -456,6 +456,12 @@ map is explained in the [Firmware Design]. Trusted Watchdog may be disabled at build time for testing or development purposes. +* `ARM_CONFIG_CNTACR`: boolean option to unlock access to the CNTBase<N> + frame registers by setting the CNTCTLBase.CNTACR<N> register bits. The + frame number <N> is defined by 'PLAT_ARM_NSTIMER_FRAME_ID', which should + match the frame used by the Non-Secure image (normally the Linux kernel). + Default is true (access to the frame is allowed). + #### ARM CSS platform specific build options * `CSS_DETECT_PRE_1_7_0_SCP`: Boolean flag to detect SCP version diff --git a/plat/arm/common/aarch64/arm_common.c b/plat/arm/common/aarch64/arm_common.c index d42009d7..a211f16d 100644 --- a/plat/arm/common/aarch64/arm_common.c +++ b/plat/arm/common/aarch64/arm_common.c @@ -151,10 +151,12 @@ void arm_configure_sys_timer(void) { unsigned int reg_val; +#if ARM_CONFIG_CNTACR reg_val = (1 << CNTACR_RPCT_SHIFT) | (1 << CNTACR_RVCT_SHIFT); reg_val |= (1 << CNTACR_RFRQ_SHIFT) | (1 << CNTACR_RVOFF_SHIFT); reg_val |= (1 << CNTACR_RWVT_SHIFT) | (1 << CNTACR_RWPT_SHIFT); mmio_write_32(ARM_SYS_TIMCTL_BASE + CNTACR_BASE(PLAT_ARM_NSTIMER_FRAME_ID), reg_val); +#endif /* ARM_CONFIG_CNTACR */ reg_val = (1 << CNTNSAR_NS_SHIFT(PLAT_ARM_NSTIMER_FRAME_ID)); mmio_write_32(ARM_SYS_TIMCTL_BASE + CNTNSAR, reg_val); diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk index 0748f921..32027355 100644 --- a/plat/arm/common/arm_common.mk +++ b/plat/arm/common/arm_common.mk @@ -72,6 +72,11 @@ endif $(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) $(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) +# Process ARM_CONFIG_CNTACR +ARM_CONFIG_CNTACR := 1 +$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) +$(eval $(call add_define,ARM_CONFIG_CNTACR)) + PLAT_INCLUDES += -Iinclude/common/tbbr \ -Iinclude/plat/arm/common \ -Iinclude/plat/arm/common/aarch64 |