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authordanh-arm <dan.handley@arm.com>2016-12-14 09:25:53 +0000
committerGitHub <noreply@github.com>2016-12-14 09:25:53 +0000
commit86450fe690b6056c5d444b11d79efb2a0660b855 (patch)
tree798c4abaa8a5d65f1a0357c32b4019ee23def5bc
parenta6b25333e9363de84e2c4aa5aefcc29198b0e64d (diff)
parentadefa3d82fb483e7044009da85985c3070f8c393 (diff)
Merge pull request #777 from jeenu-arm/format-fix
Docs: Fix monospace formatting in user guide
-rw-r--r--docs/user-guide.md6
1 files changed, 3 insertions, 3 deletions
diff --git a/docs/user-guide.md b/docs/user-guide.md
index a5b30efa..e910790c 100644
--- a/docs/user-guide.md
+++ b/docs/user-guide.md
@@ -439,7 +439,7 @@ performed.
of certificates in the FIP and FWU_FIP depends upon the value of the
`GENERATE_COT` option.
- Note: This option depends on 'CREATE_KEYS' to be enabled. If the keys
+ Note: This option depends on `CREATE_KEYS` to be enabled. If the keys
already exist in disk, they will be overwritten without further notice.
* `TRUSTED_WORLD_KEY`: This option is used when `GENERATE_COT=1`. It
@@ -475,7 +475,7 @@ performed.
#### ARM development platform specific build options
-* 'ARM_BL31_IN_DRAM': Boolean option to select loading of BL31 in TZC secured
+* `ARM_BL31_IN_DRAM`: Boolean option to select loading of BL31 in TZC secured
DRAM. By default, BL31 is in the secure SRAM. Set this flag to 1 to load
BL31 in TZC secured DRAM. If TSP is present, then setting this option also
sets the TSP location to DRAM and ignores the `ARM_TSP_RAM_LOCATION` build
@@ -491,7 +491,7 @@ performed.
* `ARM_CONFIG_CNTACR`: boolean option to unlock access to the CNTBase<N>
frame registers by setting the CNTCTLBase.CNTACR<N> register bits. The
- frame number <N> is defined by 'PLAT_ARM_NSTIMER_FRAME_ID', which should
+ frame number <N> is defined by `PLAT_ARM_NSTIMER_FRAME_ID`, which should
match the frame used by the Non-Secure image (normally the Linux kernel).
Default is true (access to the frame is allowed).