diff options
| author | davidcunado-arm <david.cunado@arm.com> | 2017-09-25 23:34:28 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-09-25 23:34:28 +0100 |
| commit | c2280b37ea387dda5ebeb9e86f3dfbe39b5b0abc (patch) | |
| tree | 2215475640a2d4519d5a0cd2e11ef34a0f6bd891 | |
| parent | 36f52843e17576d476b9005bb55aa49c5a52088d (diff) | |
| parent | 3388b38dc3426d28aeeb2462ee5125ec983e9f3a (diff) | |
Merge pull request #1105 from antonio-nino-diaz-arm/an/epd1-bit
Set TCR_EL1.EPD1 bit to 1
| -rw-r--r-- | include/lib/aarch64/arch.h | 2 | ||||
| -rw-r--r-- | lib/xlat_tables/aarch64/xlat_tables.c | 6 | ||||
| -rw-r--r-- | lib/xlat_tables_v2/aarch64/xlat_tables_arch.c | 6 |
3 files changed, 12 insertions, 2 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 83f072fc..f85e7897 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -348,6 +348,8 @@ #define TCR_SH_OUTER_SHAREABLE (U(0x2) << 12) #define TCR_SH_INNER_SHAREABLE (U(0x3) << 12) +#define TCR_EPD1_BIT (U(1) << 23) + #define MODE_SP_SHIFT U(0x0) #define MODE_SP_MASK U(0x1) #define MODE_SP_EL0 U(0x0) diff --git a/lib/xlat_tables/aarch64/xlat_tables.c b/lib/xlat_tables/aarch64/xlat_tables.c index 2ddf8cba..28ae1f73 100644 --- a/lib/xlat_tables/aarch64/xlat_tables.c +++ b/lib/xlat_tables/aarch64/xlat_tables.c @@ -182,7 +182,11 @@ void init_xlat_tables(void) /* Define EL1 and EL3 variants of the function enabling the MMU */ DEFINE_ENABLE_MMU_EL(1, - (tcr_ps_bits << TCR_EL1_IPS_SHIFT), + /* + * TCR_EL1.EPD1: Disable translation table walk for addresses + * that are translated using TTBR1_EL1. + */ + TCR_EPD1_BIT | (tcr_ps_bits << TCR_EL1_IPS_SHIFT), tlbivmalle1) DEFINE_ENABLE_MMU_EL(3, TCR_EL3_RES1 | (tcr_ps_bits << TCR_EL3_PS_SHIFT), diff --git a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c index 097e815c..760db928 100644 --- a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c +++ b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c @@ -256,7 +256,11 @@ void enable_mmu_arch(unsigned int flags, #if IMAGE_EL == 1 assert(IS_IN_EL(1)); - tcr |= tcr_ps_bits << TCR_EL1_IPS_SHIFT; + /* + * TCR_EL1.EPD1: Disable translation table walk for addresses that are + * translated using TTBR1_EL1. + */ + tcr |= TCR_EPD1_BIT | (tcr_ps_bits << TCR_EL1_IPS_SHIFT); enable_mmu_internal_el1(flags, mair, tcr, ttbr); #elif IMAGE_EL == 3 assert(IS_IN_EL(3)); |