diff options
author | Varun Wadekar <vwadekar@nvidia.com> | 2016-03-03 13:22:39 -0800 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-03-22 11:38:16 -0700 |
commit | ea96ac175e1778d1abedf3bed4e5606c8734e572 (patch) | |
tree | 212ab0ad4c36fa8fdee51118d834d05337fa9196 | |
parent | 4122151f6d0809de7b8d0b6b78c547307c16d99f (diff) |
Tegra186: memctrl_v2: restore video memory settings
The memory controller loses its settings when the device enters system
suspend state.
This patch adds a handler to restore the Video Memory settings in the
memory controller, which would be called after exiting the system suspend
state.
Change-Id: I1ac12426d7290ac1452983d3c9e05fabbf3327fa
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
-rw-r--r-- | plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c | 13 | ||||
-rw-r--r-- | plat/nvidia/tegra/include/drivers/memctrl_v2.h | 18 |
2 files changed, 9 insertions, 22 deletions
diff --git a/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c b/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c index 4d8d307c..e11b8ada 100644 --- a/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c +++ b/plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c @@ -35,6 +35,7 @@ #include <memctrl.h> #include <memctrl_v2.h> #include <mmio.h> +#include <smmu.h> #include <string.h> #include <tegra_def.h> #include <xlat_tables.h> @@ -234,7 +235,7 @@ const static mc_txn_override_cfg_t mc_override_cfgs[] = { }; /* - * Init SMMU. + * Init Memory controller during boot. */ void tegra_memctrl_setup(void) { @@ -248,9 +249,7 @@ void tegra_memctrl_setup(void) INFO("Tegra Memory Controller (v2)\n"); /* Program the SMMU pagesize */ - val = tegra_smmu_read_32(ARM_SMMU_GSR0_SECURE_ACR); - val |= ARM_SMMU_GSR0_PGSIZE_64K; - tegra_smmu_write_32(ARM_SMMU_GSR0_SECURE_ACR, val); + tegra_smmu_init(); /* Program all the Stream ID overrides */ for (i = 0; i < num_overrides; i++) @@ -316,7 +315,13 @@ void tegra_memctrl_setup(void) } } +} +/* + * Restore Memory Controller settings after "System Suspend" + */ +void tegra_memctrl_restore_settings(void) +{ /* video memory carveout region */ if (video_mem_base) { tegra_mc_write_32(MC_VIDEO_PROTECT_BASE_LO, diff --git a/plat/nvidia/tegra/include/drivers/memctrl_v2.h b/plat/nvidia/tegra/include/drivers/memctrl_v2.h index c1061fec..9623e25f 100644 --- a/plat/nvidia/tegra/include/drivers/memctrl_v2.h +++ b/plat/nvidia/tegra/include/drivers/memctrl_v2.h @@ -309,14 +309,6 @@ typedef struct mc_txn_override_cfg { } /******************************************************************************* - * Memory Controller SMMU Global Secure Aux. Configuration Register - ******************************************************************************/ -#define ARM_SMMU_GSR0_SECURE_ACR 0x10 -#define ARM_SMMU_GSR0_PGSIZE_SHIFT 16 -#define ARM_SMMU_GSR0_PGSIZE_4K (0 << ARM_SMMU_GSR0_PGSIZE_SHIFT) -#define ARM_SMMU_GSR0_PGSIZE_64K (1 << ARM_SMMU_GSR0_PGSIZE_SHIFT) - -/******************************************************************************* * Structure to hold the Stream ID to use to override client inputs ******************************************************************************/ typedef struct mc_streamid_override_cfg { @@ -396,14 +388,4 @@ static inline void tegra_mc_streamid_write_32(uint32_t off, uint32_t val) mmio_write_32(TEGRA_MC_STREAMID_BASE + off, val); } -static inline uint32_t tegra_smmu_read_32(uint32_t off) -{ - return mmio_read_32(TEGRA_SMMU_BASE + off); -} - -static inline void tegra_smmu_write_32(uint32_t off, uint32_t val) -{ - mmio_write_32(TEGRA_SMMU_BASE + off, val); -} - #endif /* __MEMCTRLV2_H__ */ |