diff options
author | Soby Mathew <soby.mathew@arm.com> | 2018-09-07 16:34:02 +0100 |
---|---|---|
committer | GitHub <noreply@github.com> | 2018-09-07 16:34:02 +0100 |
commit | 03f3632ce63dc7bf44913efdbd86f521eef49809 (patch) | |
tree | 419b24ff0e2b33357628736d2109a3c97d26efe9 | |
parent | b51d4337c33968a74a4fa100600d9bebe8088e9a (diff) | |
parent | 2431d00f34b513368100a39af4a4df20e25943ed (diff) |
Merge pull request #1566 from EvanLloyd/non_secure_uart
ARM Platforms:Enable non-secure access to UART1
-rw-r--r-- | plat/arm/css/common/css_common.mk | 9 | ||||
-rw-r--r-- | plat/arm/soc/common/soc_css_security.c | 8 |
2 files changed, 16 insertions, 1 deletions
diff --git a/plat/arm/css/common/css_common.mk b/plat/arm/css/common/css_common.mk index 29dd01d1..984c1da0 100644 --- a/plat/arm/css/common/css_common.mk +++ b/plat/arm/css/common/css_common.mk @@ -85,3 +85,12 @@ endif # Process CSS_USE_SCMI_SDS_DRIVER flag $(eval $(call assert_boolean,CSS_USE_SCMI_SDS_DRIVER)) $(eval $(call add_define,CSS_USE_SCMI_SDS_DRIVER)) + +# Process CSS_NON_SECURE_UART flag +# This undocumented build option is only to enable debug access to the UART +# from non secure code, which is useful on some platforms. +# Default (obviously) is off. +CSS_NON_SECURE_UART := 0 +$(eval $(call assert_boolean,CSS_NON_SECURE_UART)) +$(eval $(call add_define,CSS_NON_SECURE_UART)) + diff --git a/plat/arm/soc/common/soc_css_security.c b/plat/arm/soc/common/soc_css_security.c index 19bd76f8..f2296796 100644 --- a/plat/arm/soc/common/soc_css_security.c +++ b/plat/arm/soc/common/soc_css_security.c @@ -23,7 +23,7 @@ void soc_css_init_nic400(void) /* * Allow non-secure access to some SOC regions, excluding UART1, which - * remains secure. + * remains secure (unless CSS_NON_SECURE_UART is set). * Note: This is the NIC-400 device on the SOC */ mmio_write_32(SOC_CSS_NIC400_BASE + @@ -36,9 +36,15 @@ void soc_css_init_nic400(void) NIC400_ADDR_CTRL_SECURITY_REG(SOC_CSS_NIC400_PL354_SMC), ~0); mmio_write_32(SOC_CSS_NIC400_BASE + NIC400_ADDR_CTRL_SECURITY_REG(SOC_CSS_NIC400_APB4_BRIDGE), ~0); +#if CSS_NON_SECURE_UART + /* Configure UART for non-secure access */ + mmio_write_32(SOC_CSS_NIC400_BASE + + NIC400_ADDR_CTRL_SECURITY_REG(SOC_CSS_NIC400_BOOTSEC_BRIDGE), ~0); +#else mmio_write_32(SOC_CSS_NIC400_BASE + NIC400_ADDR_CTRL_SECURITY_REG(SOC_CSS_NIC400_BOOTSEC_BRIDGE), ~SOC_CSS_NIC400_BOOTSEC_BRIDGE_UART1); +#endif /* CSS_NON_SECURE_UART */ } |