diff options
| author | Jiafei Pan <Jiafei.Pan@nxp.com> | 2018-03-27 23:00:55 +0800 |
|---|---|---|
| committer | Jiafei Pan <Jiafei.Pan@nxp.com> | 2018-04-07 10:13:59 +0800 |
| commit | b4ad9768448f63a9be9216d93a6717d22b2fee2e (patch) | |
| tree | 192dda212c988e8ae5802cba44b3be0b9896dc6b | |
| parent | 7d173fc594d7d50c02e180c56c59ca1d3e51152e (diff) | |
fix instruction address range limitation
For the adr instruction, it require the label's offset from the
address of this instruction must be in the range +/-1MB. If the
option "BL2_IN_XIP_MEM" is set to '1', in some cases, BL2's RW
memory will not in the range of +/-1MB from BL2's RO memory region.
so we need to use ldr instruction to cover this case.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
| -rw-r--r-- | include/common/aarch64/el3_common_macros.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/common/aarch64/el3_common_macros.S b/include/common/aarch64/el3_common_macros.S index e85249c4..d5f527aa 100644 --- a/include/common/aarch64/el3_common_macros.S +++ b/include/common/aarch64/el3_common_macros.S @@ -278,8 +278,8 @@ * an earlier boot loader stage. * ------------------------------------------------------------- */ - adr x0, __RW_START__ - adr x1, __RW_END__ + ldr x0, =__RW_START__ + ldr x1, =__RW_END__ sub x1, x1, x0 bl inv_dcache_range #endif |