diff options
author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2018-08-13 15:29:29 +0100 |
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committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2018-08-30 09:22:15 +0100 |
commit | b9f68dfbfe51e417bb60e7b6db64281da545537f (patch) | |
tree | bffe44c5c11d3b3a7c24fb1ce057216e9bea352b | |
parent | 2a7c9e15c23b376121747ccae78bef91db6225ba (diff) |
gic v3: Turn macros into static inline functions
Change-Id: Ib587f12f36810fc7d4f4b8f575195554299b8ed4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-rw-r--r-- | drivers/arm/gic/v3/gicv3_private.h | 22 | ||||
-rw-r--r-- | include/drivers/arm/gicv3.h | 38 |
2 files changed, 43 insertions, 17 deletions
diff --git a/drivers/arm/gic/v3/gicv3_private.h b/drivers/arm/gic/v3/gicv3_private.h index e1c0775f..357a76f9 100644 --- a/drivers/arm/gic/v3/gicv3_private.h +++ b/drivers/arm/gic/v3/gicv3_private.h @@ -27,20 +27,28 @@ * GICD_IROUTER. Bits[31:24] in the MPIDR are cleared as they are not relevant * to GICv3. */ -#define gicd_irouter_val_from_mpidr(_mpidr, _irm) \ - ((_mpidr & ~(0xff << 24)) | \ - (_irm & IROUTER_IRM_MASK) << IROUTER_IRM_SHIFT) +static inline u_register_t gicd_irouter_val_from_mpidr(u_register_t mpidr, + unsigned int irm) +{ + return (mpidr & ~(U(0xff) << 24)) | + ((irm & IROUTER_IRM_MASK) << IROUTER_IRM_SHIFT); +} /* * Macro to convert a GICR_TYPER affinity value into a MPIDR value. Bits[31:24] * are zeroes. */ #ifdef AARCH32 -#define mpidr_from_gicr_typer(_typer_val) (((_typer_val) >> 32) & 0xffffff) +static inline u_register_t mpidr_from_gicr_typer(uint64_t typer_val) +{ + return (((typer_val) >> 32) & U(0xffffff)); +} #else -#define mpidr_from_gicr_typer(_typer_val) \ - (((((_typer_val) >> 56) & MPIDR_AFFLVL_MASK) << MPIDR_AFF3_SHIFT) | \ - (((_typer_val) >> 32) & 0xffffff)) +static inline u_register_t mpidr_from_gicr_typer(uint64_t typer_val) +{ + return (((typer_val >> 56) & MPIDR_AFFLVL_MASK) << MPIDR_AFF3_SHIFT) | + ((typer_val >> 32) & U(0xffffff)); +} #endif /******************************************************************************* diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h index c13a5c9e..94318c69 100644 --- a/include/drivers/arm/gicv3.h +++ b/include/drivers/arm/gicv3.h @@ -209,30 +209,48 @@ #ifndef __ASSEMBLY__ +#include <arch_helpers.h> #include <gic_common.h> #include <interrupt_props.h> +#include <stdbool.h> #include <stdint.h> #include <utils_def.h> -#define gicv3_is_intr_id_special_identifier(id) \ - (((id) >= PENDING_G1S_INTID) && ((id) <= GIC_SPURIOUS_INTERRUPT)) +static inline bool gicv3_is_intr_id_special_identifier(unsigned int id) +{ + return (id >= PENDING_G1S_INTID) && (id <= GIC_SPURIOUS_INTERRUPT); +} /******************************************************************************* * Helper GICv3 macros for SEL1 ******************************************************************************/ -#define gicv3_acknowledge_interrupt_sel1() read_icc_iar1_el1() &\ - IAR1_EL1_INTID_MASK -#define gicv3_get_pending_interrupt_id_sel1() read_icc_hppir1_el1() &\ - HPPIR1_EL1_INTID_MASK -#define gicv3_end_of_interrupt_sel1(id) write_icc_eoir1_el1(id) +static inline uint32_t gicv3_acknowledge_interrupt_sel1(void) +{ + return (uint32_t)read_icc_iar1_el1() & IAR1_EL1_INTID_MASK; +} +static inline uint32_t gicv3_get_pending_interrupt_id_sel1(void) +{ + return (uint32_t)read_icc_hppir1_el1() & HPPIR1_EL1_INTID_MASK; +} + +static inline void gicv3_end_of_interrupt_sel1(unsigned int id) +{ + write_icc_eoir1_el1(id); +} /******************************************************************************* * Helper GICv3 macros for EL3 ******************************************************************************/ -#define gicv3_acknowledge_interrupt() read_icc_iar0_el1() &\ - IAR0_EL1_INTID_MASK -#define gicv3_end_of_interrupt(id) write_icc_eoir0_el1(id) +static inline uint32_t gicv3_acknowledge_interrupt(void) +{ + return (uint32_t)read_icc_iar0_el1() & IAR0_EL1_INTID_MASK; +} + +static inline void gicv3_end_of_interrupt(unsigned int id) +{ + return write_icc_eoir0_el1(id); +} /* * This macro returns the total number of GICD registers corresponding to |