diff options
| author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2017-01-13 15:03:07 +0000 |
|---|---|---|
| committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2017-01-19 09:29:15 +0000 |
| commit | c8d64c54c9397f19555cb23b87c5170595ed5e7a (patch) | |
| tree | 418f7e34c5a8636c0c6ffe67cd86cbc80694d121 | |
| parent | 9eb4d4dd938a1ad86a5a0311e00beb3b5c1d5840 (diff) | |
Fix declarations of cache maintenance functions
Fix the parameter type of the maintenance functions of data cache.
Add missing declarations for AArch32 versions of dcsw_op_louis and
dcsw_op_all to match the AAch64 ones.
Change-Id: I4226e8ea4f8b2b5bc2972992c83de659ee0da52c
| -rw-r--r-- | include/lib/aarch32/arch_helpers.h | 7 | ||||
| -rw-r--r-- | include/lib/aarch64/arch_helpers.h | 14 |
2 files changed, 13 insertions, 8 deletions
diff --git a/include/lib/aarch32/arch_helpers.h b/include/lib/aarch32/arch_helpers.h index 7955d62e..3a82a7b3 100644 --- a/include/lib/aarch32/arch_helpers.h +++ b/include/lib/aarch32/arch_helpers.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -33,7 +33,7 @@ #include <arch.h> /* for additional register definitions */ #include <stdint.h> -#include <types.h> +#include <sys/types.h> /********************************************************************** * Macros which create inline functions to read or write CPU system @@ -187,6 +187,9 @@ void flush_dcache_range(uintptr_t addr, size_t size); void clean_dcache_range(uintptr_t addr, size_t size); void inv_dcache_range(uintptr_t addr, size_t size); +void dcsw_op_louis(u_register_t op_type); +void dcsw_op_all(u_register_t op_type); + void disable_mmu_secure(void); void disable_mmu_icache_secure(void); diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index aa262031..d70c9aee 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -34,6 +34,7 @@ #include <arch.h> /* for additional register definitions */ #include <cdefs.h> /* For __dead2 */ #include <stdint.h> +#include <sys/types.h> /********************************************************************** * Macros which create inline functions to read or write CPU system @@ -143,11 +144,12 @@ DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1w) DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0r) DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0w) -void flush_dcache_range(uint64_t, uint64_t); -void clean_dcache_range(uint64_t, uint64_t); -void inv_dcache_range(uint64_t, uint64_t); -void dcsw_op_louis(uint32_t); -void dcsw_op_all(uint32_t); +void flush_dcache_range(uintptr_t addr, size_t size); +void clean_dcache_range(uintptr_t addr, size_t size); +void inv_dcache_range(uintptr_t addr, size_t size); + +void dcsw_op_louis(u_register_t op_type); +void dcsw_op_all(u_register_t op_type); void disable_mmu_el3(void); void disable_mmu_icache_el3(void); |