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authordavidcunado-arm <david.cunado@arm.com>2017-07-31 14:30:27 +0100
committerGitHub <noreply@github.com>2017-07-31 14:30:27 +0100
commite43ae8e9de9b485f539b9c2bc8bef6680a060c26 (patch)
tree2e8f6a88406ceb0bc3a074521a6c9034efb7b0b7
parentddc5bfdb6ff4466eeec4006af56589544ad76e1f (diff)
parentca6b1cb4dd1f7a425ca4e8ddc670744453e6f089 (diff)
Merge pull request #1037 from douglas-raillard-arm/dr/doc_fix_errata_a53
Add doc for some Cortex A53 errata workarounds
-rw-r--r--docs/cpu-specific-build-macros.rst10
1 files changed, 10 insertions, 0 deletions
diff --git a/docs/cpu-specific-build-macros.rst b/docs/cpu-specific-build-macros.rst
index ce564a2d..5738927c 100644
--- a/docs/cpu-specific-build-macros.rst
+++ b/docs/cpu-specific-build-macros.rst
@@ -51,10 +51,20 @@ For Cortex-A53, following errata build flags are defined :
- ``ERRATA_A53_826319``: This applies errata 826319 workaround to Cortex-A53
CPU. This needs to be enabled only for revision <= r0p2 of the CPU.
+- ``ERRATA_A53_835769``: This applies erratum 835769 workaround at compile and
+ link time to Cortex-A53 CPU. This needs to be enabled for some variants of
+ revision <= r0p4. This workaround can lead the linker to create ``*.stub``
+ sections.
+
- ``ERRATA_A53_836870``: This applies errata 836870 workaround to Cortex-A53
CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From
r0p4 and onwards, this errata is enabled by default in hardware.
+- ``ERRATA_A53_843419``: This applies erratum 843419 workaround at link time
+ to Cortex-A53 CPU. This needs to be enabled for some variants of revision
+ <= r0p4. This workaround can lead the linker to emit ``*.stub`` sections
+ which are 4kB aligned.
+
- ``ERRATA_A53_855873``: This applies errata 855873 workaround to Cortex-A53
CPUs. Though the erratum is present in every revision of the CPU,
this workaround is only applied to CPUs from r0p3 onwards, which feature