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author | Etienne Carriere <etienne.carriere@st.com> | 2017-08-09 15:48:53 +0200 |
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committer | Etienne Carriere <etienne.carriere@st.com> | 2017-08-09 15:48:53 +0200 |
commit | 71816096da8e5612cece752d813e10580df9f141 (patch) | |
tree | ead9a6012f806050f68efc5e343e2924a0efb9ba /bl32/sp_min/sp_min_main.c | |
parent | 2f860c7815c648393f0604c872d5b39546da6419 (diff) |
bl32: add secure interrupt handling in AArch32 sp_min
Add support for a minimal secure interrupt service in sp_min for
the AArch32 implementation. Hard code that only FIQs are handled.
Introduce bolean build directive SP_MIN_WITH_SECURE_FIQ to enable
FIQ handling from SP_MIN.
Configure SCR[FIQ] and SCR[FW] from generic code for both cold and
warm boots to handle FIQ in secure state from monitor.
Since SP_MIN architecture, FIQ are always trapped when system executes
in non secure state. Hence discard relay of the secure/non-secure
state in the FIQ handler.
Change-Id: I1f7d1dc7b21f6f90011b7f3fcd921e455592f5e7
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Diffstat (limited to 'bl32/sp_min/sp_min_main.c')
-rw-r--r-- | bl32/sp_min/sp_min_main.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/bl32/sp_min/sp_min_main.c b/bl32/sp_min/sp_min_main.c index 1c83cbe1..06b0f333 100644 --- a/bl32/sp_min/sp_min_main.c +++ b/bl32/sp_min/sp_min_main.c @@ -207,3 +207,19 @@ void sp_min_warm_boot(void) copy_cpu_ctx_to_smc_stx(get_regs_ctx(cm_get_context(NON_SECURE)), next_smc_ctx); } + +#if SP_MIN_WITH_SECURE_FIQ +/****************************************************************************** + * This function is invoked on secure interrupts. By construction of the + * SP_MIN, secure interrupts can only be handled when core executes in non + * secure state. + *****************************************************************************/ +void sp_min_fiq(void) +{ + uint32_t id; + + id = plat_ic_acknowledge_interrupt(); + sp_min_plat_fiq_handler(id); + plat_ic_end_of_interrupt(id); +} +#endif /* SP_MIN_WITH_SECURE_FIQ */ |