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authorSoby Mathew <soby.mathew@arm.com>2019-05-07 14:31:25 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2019-05-07 14:31:25 +0000
commit0cdbd023e175cb4428801c28d640a80f2bda6bea (patch)
tree42f0579a52905bc47db656a04075a783277641af /docs/cpu-specific-build-macros.rst
parent854ca7daf9bbf4762d698128bfe030e0cebea956 (diff)
parentf85edcea5ff651a47fc1434d2d9b5475cc56aa29 (diff)
Merge changes from topic "sm/fix_a76_errata" into integration
* changes: Workaround for cortex-A76 errata 1286807 Cortex-A76: workarounds for errata 1257314, 1262606, 1262888, 1275112
Diffstat (limited to 'docs/cpu-specific-build-macros.rst')
-rw-r--r--docs/cpu-specific-build-macros.rst12
1 files changed, 12 insertions, 0 deletions
diff --git a/docs/cpu-specific-build-macros.rst b/docs/cpu-specific-build-macros.rst
index e1c89bf8..493e07e9 100644
--- a/docs/cpu-specific-build-macros.rst
+++ b/docs/cpu-specific-build-macros.rst
@@ -217,6 +217,18 @@ For Cortex-A76, the following errata build flags are defined :
- ``ERRATA_A76_1220197``: This applies errata 1220197 workaround to Cortex-A76
CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
+- ``ERRATA_A76_1257314``: This applies errata 1257314 workaround to Cortex-A76
+ CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
+
+- ``ERRATA_A76_1262606``: This applies errata 1262606 workaround to Cortex-A76
+ CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
+
+- ``ERRATA_A76_1262888``: This applies errata 1262888 workaround to Cortex-A76
+ CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
+
+- ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76
+ CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
+
DSU Errata Workarounds
----------------------