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| author | Soby Mathew <soby.mathew@arm.com> | 2019-05-01 09:43:18 +0100 |
|---|---|---|
| committer | Soby Mathew <soby.mathew@arm.com> | 2019-05-07 13:46:47 +0100 |
| commit | e6e1d0ac162027334471e1eb9f1e0ce46065db6a (patch) | |
| tree | fbc4be5d69c1395bf512be97e9adfebac5a187d9 /docs/cpu-specific-build-macros.rst | |
| parent | 8917380a1eba4f7a499a4a51b75a0488a683d2c0 (diff) | |
Cortex-A76: workarounds for errata 1257314, 1262606, 1262888, 1275112
The workarounds for errata 1257314, 1262606, 1262888 and 1275112 are
added to the Cortex-A76 cpu specific file. The workarounds are disabled
by default and have to be explicitly enabled by the platform integrator.
Change-Id: I70474927374cb67725f829d159ddde9ac4edc343
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Diffstat (limited to 'docs/cpu-specific-build-macros.rst')
| -rw-r--r-- | docs/cpu-specific-build-macros.rst | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/docs/cpu-specific-build-macros.rst b/docs/cpu-specific-build-macros.rst index e1c89bf8..493e07e9 100644 --- a/docs/cpu-specific-build-macros.rst +++ b/docs/cpu-specific-build-macros.rst @@ -217,6 +217,18 @@ For Cortex-A76, the following errata build flags are defined : - ``ERRATA_A76_1220197``: This applies errata 1220197 workaround to Cortex-A76 CPU. This needs to be enabled only for revision <= r2p0 of the CPU. +- ``ERRATA_A76_1257314``: This applies errata 1257314 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r3p0 of the CPU. + +- ``ERRATA_A76_1262606``: This applies errata 1262606 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r3p0 of the CPU. + +- ``ERRATA_A76_1262888``: This applies errata 1262888 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r3p0 of the CPU. + +- ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76 + CPU. This needs to be enabled only for revision <= r3p0 of the CPU. + DSU Errata Workarounds ---------------------- |