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author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-09-22 08:32:09 +0100 |
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committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-10-16 16:50:02 +0100 |
commit | d55a445069736e2652b44ddfeb9ea4d306796a0a (patch) | |
tree | f9620e1ed0aee2e1cc3598c7d3e6dbdeef9283a1 /docs/platform-interrupt-controller-API.rst | |
parent | a2816a16440d9eb1223ba505bc30faf6cd31b0ee (diff) |
GIC: Add API to set priority mask
API documentation updated.
Change-Id: I40feec1fe67a960d035061b54dd55610bc34ce1d
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'docs/platform-interrupt-controller-API.rst')
-rw-r--r-- | docs/platform-interrupt-controller-API.rst | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/docs/platform-interrupt-controller-API.rst b/docs/platform-interrupt-controller-API.rst index d5c16733..795c0856 100644 --- a/docs/platform-interrupt-controller-API.rst +++ b/docs/platform-interrupt-controller-API.rst @@ -274,6 +274,24 @@ In case of ARM standard platforms using GIC, the implementation of the API writes to the GIC *Clear Pending Register* to clear the interrupt pending status, and inserts barrier to make memory updates visible afterwards. +Function: unsigned int plat_ic_set_priority_mask(unsigned int id); [optional] +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +:: + + Argument : unsigned int + Return : int + +This API should set the priority mask (first parameter) in the interrupt +controller such that only interrupts of higher priority than the supplied one +may be signalled to the PE. The API should return the current priority value +that it's overwriting. + +In case of ARM standard platforms using GIC, the implementation of the API +inserts to order memory updates before updating mask, then writes to the GIC +*Priority Mask Register*, and make sure memory updates are visible before +potential trigger due to mask update. + ---- *Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.* |