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| author | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-25 11:37:38 +0000 |
|---|---|---|
| committer | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-02-26 16:21:06 +0000 |
| commit | 5cc8c7ba1b24ace2ef7345e96d933141f3609817 (patch) | |
| tree | f9ab8df5738d6245ca1b4e4fd7c5af143c223f2f /docs/platform-interrupt-controller-API.rst | |
| parent | 508d71108a06c7fce2eeef78659b9b7739cee6eb (diff) | |
Add workaround for errata 1220197 for Cortex-A76
Streaming store under specific conditions might cause deadlock or data
corruption. Set bit 25:24 of CPUECTLR_EL1, which disables write
streaming to the L2 to prevent this.
Change-Id: Ib5cabb997b35ada78b27e75787afd610ea606dcf
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Diffstat (limited to 'docs/platform-interrupt-controller-API.rst')
0 files changed, 0 insertions, 0 deletions