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authordanh-arm <dan.handley@arm.com>2014-07-11 11:19:27 +0100
committerdanh-arm <dan.handley@arm.com>2014-07-11 11:19:27 +0100
commit414cfa18da52241a0644f2293a59d5cd6347b103 (patch)
tree78f484df5af8650c231a529be125feac9b012e67 /docs/porting-guide.md
parent6a2231560b0243defba0721d15e824d21e5ae60b (diff)
parent46d49f6355afe62cab85308257105d6b540893e9 (diff)
Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2
fvp: Reuse BL1 and BL2 memory through image overlaying (v2)
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@@ -253,6 +253,17 @@ be defined as well:
the secure memory identified by `TSP_SEC_MEM_BASE` and `TSP_SEC_MEM_SIZE`
constants.
+The following constants are optional. They should be defined when the platform
+memory layout implies some image overlaying like on FVP.
+
+* **#define : BL31_PROGBITS_LIMIT**
+
+ Defines the maximum address in secure RAM that the BL3-1's progbits sections
+ can occupy.
+
+* **#define : BL32_PROGBITS_LIMIT**
+
+ Defines the maximum address that the TSP's progbits sections can occupy.
### File : plat_macros.S [mandatory]