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| author | Soby Mathew <soby.mathew@arm.com> | 2015-01-08 18:02:44 +0000 |
|---|---|---|
| committer | Dan Handley <dan.handley@arm.com> | 2015-01-22 10:57:44 +0000 |
| commit | ab8707e6875a9fe447ff04fad9053d7d719f89e6 (patch) | |
| tree | 376a47144a8349f7ce3cdf21a1a12694e7f6bba6 /docs/user-guide.md | |
| parent | 8c5fe0b5b9f1666b4ddd8f5849de80249cdebe40 (diff) | |
Remove coherent memory from the BL memory maps
This patch extends the build option `USE_COHERENT_MEMORY` to
conditionally remove coherent memory from the memory maps of
all boot loader stages. The patch also adds necessary
documentation for coherent memory removal in firmware-design,
porting and user guides.
Fixes ARM-Software/tf-issues#106
Change-Id: I260e8768c6a5c2efc402f5804a80657d8ce38773
Diffstat (limited to 'docs/user-guide.md')
| -rw-r--r-- | docs/user-guide.md | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/docs/user-guide.md b/docs/user-guide.md index b33c4c0c..5ad44a89 100644 --- a/docs/user-guide.md +++ b/docs/user-guide.md @@ -245,6 +245,12 @@ performed. synchronous method) or 1 (BL3-2 is initialized using asynchronous method). Default is 0. +* `USE_COHERENT_MEM`: This flag determines whether to include the coherent + memory region in the BL memory map or not (see "Use of Coherent memory in + Trusted Firmware" section in [Firmware Design]). It can take the value 1 + (Coherent memory region is included) or 0 (Coherent memory region is + excluded). Default is 1. + #### FVP specific build options * `FVP_TSP_RAM_LOCATION`: location of the TSP binary. Options: |