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author | Varun Wadekar <vwadekar@nvidia.com> | 2016-09-23 14:28:16 -0700 |
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committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-04-07 09:15:51 -0700 |
commit | 691bc22de951947bcc5d3bb637858fde7283781c (patch) | |
tree | 66beeeba3d7772d536498010cc41bf2b77c45734 /drivers/arm/ccn/ccn.c | |
parent | e698a822f06e40ba4f59abaf269bbd1379da57d7 (diff) |
Tegra186: read activity monitor's clock counter values
This patch adds a new SMC function ID to read the refclk and coreclk
clock counter values from the Activity Monitor. The non-secure world
requires this information to calculate the CPU's frequency.
Formula: "freq = (delta_coreclk / delta_refclk) * refclk_freq"
The following CPU registers have to be set by the non-secure driver
before issuing the SMC:
X1 = MPIDR of the target core
X2 = MIDR of the target core
Change-Id: I296d835def1f5788c17640c0c456b8f8f0e90824
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'drivers/arm/ccn/ccn.c')
0 files changed, 0 insertions, 0 deletions