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| author | Varun Wadekar <vwadekar@nvidia.com> | 2016-02-17 15:07:49 -0800 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-03-20 09:14:51 -0700 |
| commit | be87d920bfd8c70dc3c96dc726f1686bd3430cc0 (patch) | |
| tree | 32013e3827a7b15c48b91c2c40089676f58dd2b5 /drivers/arm/ccn/ccn.c | |
| parent | 67bc721b2bc321e07b1ea50c53dd35915dc2a949 (diff) | |
Tegra: memctrl_v2: implement MC txn override WAR
This patch sets the Memory Controller's TXN_OVERRIDE registers
for most write clients to CGID_ADR. This ensures ordering is maintained.
In some cases WAW ordering problems could occur. There are different
settings for Tegra version A01 v A02.
Original changes by Alex Waterman <alexw@nvidia.com>
Change-Id: I82ea02afa43a24250ed56985757b83e78e71178c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'drivers/arm/ccn/ccn.c')
0 files changed, 0 insertions, 0 deletions