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authorYatharth Kochar <yatharth.kochar@arm.com>2016-11-14 12:01:04 +0000
committerdp-arm <dimitris.papastamos@arm.com>2017-04-20 15:05:21 +0100
commit07570d592ea5b8a0ea22f23d2d502782b9d6c1c5 (patch)
tree7744838900739daf5cb61d5623c298abd7c403b3 /drivers/arm/ccn/ccn.c
parentdc787588a557d09fbf46c8562d7060cd39e275d9 (diff)
Changes to support execution in AArch32 state for JUNO
Following steps are required to boot JUNO in AArch32 state: 1> BL1, in AArch64 state, loads BL2. 2> BL2, in AArch64 state, initializes DDR. Loads SP_MIN & BL33 (AArch32 executable)images. Calls RUN_IMAGE SMC to go back to BL1. 3> BL1 writes AArch32 executable opcodes, to load and branch at the entrypoint address of SP_MIN, at HI-VECTOR address and then request for warm reset in AArch32 state using RMR_EL3. This patch makes following changes to facilitate above steps: * Added assembly function to carry out step 3 above. * Added region in TZC that enables Secure access to the HI-VECTOR(0xFFFF0000) address space. * AArch32 image descriptor is used, in BL2, to load SP_MIN and BL33 AArch32 executable images. A new flag `JUNO_AARCH32_EL3_RUNTIME` is introduced that controls above changes. By default this flag is disabled. NOTE: BL1 and BL2 are not supported in AArch32 state for JUNO. Change-Id: I091d56a0e6d36663e6d9d2bb53c92c672195d1ec Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com> Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
Diffstat (limited to 'drivers/arm/ccn/ccn.c')
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