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| author | Chandni Cherukuri <chandni.cherukuri@arm.com> | 2018-08-07 14:52:55 +0530 |
|---|---|---|
| committer | Chandni Cherukuri <chandni.cherukuri@arm.com> | 2018-10-26 12:14:03 +0530 |
| commit | 20a8f7a862fe018ead697f6dee46ee1db03951ad (patch) | |
| tree | 36f458d4e4c17efa7a9d909d6d24a1f7ca9d9630 /drivers/arm/ccn/ccn.c | |
| parent | 31abc7c45428398a330a3a940fe4dd7efa6c96f2 (diff) | |
plat/arm/sgi: disable Ares cpu power down bit in reset handler
On SGI platforms that include Ares CPUs, the 'CORE_PWRDN_EN' bit of
'CPUPWRCTLR_EL1' register requires an explicit write to clear it to
enable hotplug and idle to function correctly.
The reset value of the CORE_PWRDN_EN bit is zero but it still requires
this explicit clear to zero. This indicates that this could be a model
related issue but for now this issue can be fixed be clearing the
CORE_PWRDN_EN bit in the platform specific reset handler function.
Change-Id: I8b9884ae27a2986d789bfec2e9ae792ef930944e
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Diffstat (limited to 'drivers/arm/ccn/ccn.c')
0 files changed, 0 insertions, 0 deletions