diff options
| author | Caesar Wang <wxt@rock-chips.com> | 2016-09-27 18:19:30 -0700 |
|---|---|---|
| committer | Caesar Wang <wxt@rock-chips.com> | 2016-09-29 00:51:19 +0800 |
| commit | 4d5d98c77c0c3276cf6b9f39e6efbf5eccf44d6c (patch) | |
| tree | a9b3859a0a8864ac2d4275567583b65440a9cd45 /drivers/arm/ccn/ccn.c | |
| parent | bfd925139fdbc2e87979849907b34843aa326994 (diff) | |
rockchip: fixes the clock select and divide register for rk3399
As the new RK3399TRM v1.1, there are some wrong set for CRU_CLKSEL_CON
register.
As the CRU_CLKSEL_CON96～107 high 16-bit isn't write mask and the
CRU_CLKSEL_CON offset is 0x100,not 0x80.
Change-Id: Ie127e9de74b87100af9a0150aad43e89e4972529
Diffstat (limited to 'drivers/arm/ccn/ccn.c')
0 files changed, 0 insertions, 0 deletions