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| author | lauwal01 <lauren.wehrmeister@arm.com> | 2019-06-24 11:49:01 -0500 |
|---|---|---|
| committer | lauwal01 <lauren.wehrmeister@arm.com> | 2019-07-02 09:17:19 -0500 |
| commit | 4d8801fe5aa0d26ab3df42d31f0e7129209d301b (patch) | |
| tree | 02ee9ea90f76f197dc219d6e1b3527658c645c0d /drivers/arm/ccn/ccn.c | |
| parent | 11c48370bd8c1dfdf5221a073a26615904c94413 (diff) | |
Workaround for Neoverse N1 erratum 1275112
Neoverse N1 erratum 1275112 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR_EL1 system register, which delays instruction fetch after
branch misprediction.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html
Change-Id: If7fe55fe92e656fa6aea12327ab297f2e6119833
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Diffstat (limited to 'drivers/arm/ccn/ccn.c')
0 files changed, 0 insertions, 0 deletions