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| author | danh-arm <dan.handley@arm.com> | 2016-12-20 12:26:23 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2016-12-20 12:26:23 +0000 |
| commit | 9acdafbccf730179406ce7693772d7f7dcc4ae3c (patch) | |
| tree | 3f63845f5abefdcd6a6cc977b1c8acd437dd6832 /drivers | |
| parent | 9e75fddc3a89c1c2fbaf38213e627668271d6af5 (diff) | |
| parent | 74a9578c209fc96eaed4ffdd26fd0e5fe94e21a9 (diff) | |
Merge pull request #793 from jeenu-arm/gic-changes
GIC driver changes for extended power management
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/arm/gic/v3/gicv3_main.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/arm/gic/v3/gicv3_main.c b/drivers/arm/gic/v3/gicv3_main.c index ac433725..5abaa1ce 100644 --- a/drivers/arm/gic/v3/gicv3_main.c +++ b/drivers/arm/gic/v3/gicv3_main.c @@ -40,6 +40,13 @@ static const gicv3_driver_data_t *driver_data; static unsigned int gicv2_compat; +/* + * Redistributor power operations are weakly bound so that they can be + * overridden + */ +#pragma weak gicv3_rdistif_off +#pragma weak gicv3_rdistif_on + /******************************************************************************* * This function initialises the ARM GICv3 driver in EL3 with provided platform * inputs. @@ -188,6 +195,9 @@ void gicv3_rdistif_init(unsigned int proc_num) assert(IS_IN_EL3()); + /* Power on redistributor */ + gicv3_rdistif_on(proc_num); + gicr_base = driver_data->rdistif_base_addrs[proc_num]; /* Set the default attribute of all SGIs and PPIs */ @@ -211,6 +221,19 @@ void gicv3_rdistif_init(unsigned int proc_num) } /******************************************************************************* + * Functions to perform power operations on GIC Redistributor + ******************************************************************************/ +void gicv3_rdistif_off(unsigned int proc_num) +{ + return; +} + +void gicv3_rdistif_on(unsigned int proc_num) +{ + return; +} + +/******************************************************************************* * This function enables the GIC CPU interface of the calling CPU using only * system register accesses. ******************************************************************************/ |