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authorAndrew Thoelke <andrew.thoelke@arm.com>2014-06-04 21:10:52 +0100
committerAndrew Thoelke <andrew.thoelke@arm.com>2014-06-23 14:55:44 +0100
commit167a935733a6e3e412b8ed6a60034d0d84895f2e (patch)
treec443557e8fe8ff50628567aa6ebfc11f6fc9f6dd /include/bl31
parent5298f2cb98b9bdc18eb2f25cd28180ba7fd000d8 (diff)
Initialise CPU contexts from entry_point_info
Consolidate all BL3-1 CPU context initialization for cold boot, PSCI and SPDs into two functions: * The first uses entry_point_info to initialize the relevant cpu_context for first entry into a lower exception level on a CPU * The second populates the EL1 and EL2 system registers as needed from the cpu_context to ensure correct entry into the lower EL This patch alters the way that BL3-1 determines which exception level is used when first entering EL1 or EL2 during cold boot - this is now fully determined by the SPSR value in the entry_point_info for BL3-3, as set up by the platform code in BL2 (or otherwise provided to BL3-1). In the situation that EL1 (or svc mode) is selected for a processor that supports EL2, the context management code will now configure all essential EL2 register state to ensure correct execution of EL1. This allows the platform code to run non-secure EL1 payloads directly without requiring a small EL2 stub or OS loader. Change-Id: If9fbb2417e82d2226e47568203d5a369f39d3b0f
Diffstat (limited to 'include/bl31')
-rw-r--r--include/bl31/context_mgmt.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/include/bl31/context_mgmt.h b/include/bl31/context_mgmt.h
index ade2fa1d..6127b74b 100644
--- a/include/bl31/context_mgmt.h
+++ b/include/bl31/context_mgmt.h
@@ -35,6 +35,11 @@
#include <stdint.h>
/*******************************************************************************
+ * Forward declarations
+ ******************************************************************************/
+struct entry_point_info;
+
+/*******************************************************************************
* Function & variable prototypes
******************************************************************************/
void cm_init(void);
@@ -45,12 +50,14 @@ void cm_set_context_by_mpidr(uint64_t mpidr,
uint32_t security_state);
static inline void cm_set_context(void *context, uint32_t security_state);
void cm_el3_sysregs_context_save(uint32_t security_state);
+void cm_init_context(uint64_t mpidr, const struct entry_point_info *ep);
+void cm_prepare_el3_exit(uint32_t security_state);
void cm_el3_sysregs_context_restore(uint32_t security_state);
void cm_el1_sysregs_context_save(uint32_t security_state);
void cm_el1_sysregs_context_restore(uint32_t security_state);
-void cm_set_el3_eret_context(uint32_t security_state, uint64_t entrypoint,
- uint32_t spsr, uint32_t scr);
void cm_set_elr_el3(uint32_t security_state, uint64_t entrypoint);
+void cm_set_elr_spsr_el3(uint32_t security_state,
+ uint64_t entrypoint, uint32_t spsr);
void cm_write_scr_el3_bit(uint32_t security_state,
uint32_t bit_pos,
uint32_t value);