diff options
| author | Roberto Vargas <roberto.vargas@arm.com> | 2017-10-30 14:43:43 +0000 |
|---|---|---|
| committer | Roberto Vargas <roberto.vargas@arm.com> | 2018-01-18 09:42:35 +0000 |
| commit | b1d27b484f4172542eca074fdac42ffd13736a0f (patch) | |
| tree | aa9ceb97f7bb103de9bfc7237169aa3e833c2ba7 /include/common/aarch32 | |
| parent | 34c2b9c2f144e213533c00bbdedb8da5b786311b (diff) | |
bl2-el3: Add BL2_EL3 image
This patch enables BL2 to execute at the highest exception level
without any dependancy on TF BL1. This enables platforms which already
have a non-TF Boot ROM to directly load and execute BL2 and subsequent BL
stages without need for BL1. This is not currently possible because
BL2 executes at S-EL1 and cannot jump straight to EL3.
Change-Id: Ief1efca4598560b1b8c8e61fbe26d1f44e929d69
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Diffstat (limited to 'include/common/aarch32')
| -rw-r--r-- | include/common/aarch32/el3_common_macros.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/common/aarch32/el3_common_macros.S b/include/common/aarch32/el3_common_macros.S index 59e99f89..d654b652 100644 --- a/include/common/aarch32/el3_common_macros.S +++ b/include/common/aarch32/el3_common_macros.S @@ -260,9 +260,9 @@ * --------------------------------------------------------------------- */ .if \_init_c_runtime -#ifdef IMAGE_BL32 +#if defined(IMAGE_BL32) || (defined(IMAGE_BL2) && BL2_AT_EL3) /* ----------------------------------------------------------------- - * Invalidate the RW memory used by the BL32 (SP_MIN) image. This + * Invalidate the RW memory used by the image. This * includes the data and NOBITS sections. This is done to * safeguard against possible corruption of this memory by * dirty cache lines in a system cache as a result of use by @@ -273,7 +273,7 @@ ldr r1, =__RW_END__ sub r1, r1, r0 bl inv_dcache_range -#endif /* IMAGE_BL32 */ +#endif ldr r0, =__BSS_START__ ldr r1, =__BSS_SIZE__ |