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| author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2017-02-27 17:23:54 +0000 |
|---|---|---|
| committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2017-03-08 14:40:27 +0000 |
| commit | 0b64f4ef437a20f4d08df6a96ba95a43116efb8d (patch) | |
| tree | 4e48182894b9d5026e6edadd167552b1468d749d /include/lib/aarch64/arch.h | |
| parent | f10644c569e9c6d4b5b6565b499c3cafda03a65a (diff) | |
Add dynamic region support to xlat tables lib v2
Added APIs to add and remove regions to the translation tables
dynamically while the MMU is enabled. Only static regions are allowed
to overlap other static ones (for backwards compatibility).
A new private attribute (MT_DYNAMIC / MT_STATIC) has been added to
flag each region as such.
The dynamic mapping functionality can be enabled or disabled when
compiling by setting the build option PLAT_XLAT_TABLES_DYNAMIC to 1
or 0. This can be done per-image.
TLB maintenance code during dynamic table mapping and unmapping has
also been added.
Fixes ARM-software/tf-issues#310
Change-Id: I19e8992005c4292297a382824394490c5387aa3b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'include/lib/aarch64/arch.h')
| -rw-r--r-- | include/lib/aarch64/arch.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 5876ce81..f1ad9bb4 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -31,6 +31,7 @@ #ifndef __ARCH_H__ #define __ARCH_H__ +#include <utils.h> /******************************************************************************* * MIDR bit definitions @@ -418,6 +419,15 @@ #define EC_BITS(x) (x >> ESR_EC_SHIFT) & ESR_EC_MASK /******************************************************************************* + * Definitions of register offsets, fields and macros for CPU system + * instructions. + ******************************************************************************/ + +#define TLBI_ADDR_SHIFT 12 +#define TLBI_ADDR_MASK ULL(0x00000FFFFFFFFFFF) +#define TLBI_ADDR(x) (((x) >> TLBI_ADDR_SHIFT) & TLBI_ADDR_MASK) + +/******************************************************************************* * Definitions of register offsets and fields in the CNTCTLBase Frame of the * system level implementation of the Generic Timer. ******************************************************************************/ |