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| author | Isla Mitchell <isla.mitchell@arm.com> | 2017-08-07 11:20:13 +0100 |
|---|---|---|
| committer | Isla Mitchell <isla.mitchell@arm.com> | 2017-08-24 17:23:43 +0100 |
| commit | 9fce2725a4c863983f09ba71289f00931c156202 (patch) | |
| tree | 3601fa7dd5efed787ea701a2e10a4e9313e85755 /include/lib/aarch64/arch.h | |
| parent | f45e232ab9c93c22c1cffa2ee4c17f34d808b918 (diff) | |
Enable CnP bit for ARMv8.2 CPUs
This patch enables the CnP (Common not Private) bit for secure page
tables so that multiple PEs in the same Inner Shareable domain can use
the same translation table entries for a given stage of translation in
a particular translation regime. This only takes effect when ARM
Trusted Firmware is built with ARM_ARCH_MINOR >= 2.
ARM Trusted Firmware Design has been updated to include a description
of this feature usage.
Change-Id: I698305f047400119aa1900d34c65368022e410b8
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
Diffstat (limited to 'include/lib/aarch64/arch.h')
| -rw-r--r-- | include/lib/aarch64/arch.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 7bceea77..2adf7699 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -396,6 +396,11 @@ (((aif) & SPSR_AIF_MASK) << SPSR_AIF_SHIFT)) /* + * TTBR Definitions + */ +#define TTBR_CNP_BIT 0x1 + +/* * CTR_EL0 definitions */ #define CTR_CWG_SHIFT U(24) |