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| author | Scott Branden <sbranden@users.noreply.github.com> | 2017-04-29 08:36:12 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-04-29 08:36:12 -0700 |
| commit | 0f22bef31d402e24fab77eb2a3c643d042b7e79c (patch) | |
| tree | 6595ed7f87249ccbd4a953ba5cdc00963a130d18 /include/lib/aarch64 | |
| parent | 53d9c9c85bc49845c4c40315e1ab29d627a1f8c3 (diff) | |
| parent | dd454b40dfe42dbf77e2f04a3965295380b4f78d (diff) | |
Merge branch 'integration' into tf_issue_461
Diffstat (limited to 'include/lib/aarch64')
| -rw-r--r-- | include/lib/aarch64/arch.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 399a6438..ef7241d3 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -261,6 +261,16 @@ #define DISABLE_ALL_EXCEPTIONS \ (DAIF_FIQ_BIT | DAIF_IRQ_BIT | DAIF_ABT_BIT | DAIF_DBG_BIT) +/* + * RMR_EL3 definitions + */ +#define RMR_EL3_RR_BIT (1 << 1) +#define RMR_EL3_AA64_BIT (1 << 0) + +/* + * HI-VECTOR address for AArch32 state + */ +#define HI_VECTOR_BASE (0xFFFF0000) /* * TCR defintions @@ -419,6 +429,10 @@ #define EC_BITS(x) (x >> ESR_EC_SHIFT) & ESR_EC_MASK +/* Reset bit inside the Reset management register for EL3 (RMR_EL3) */ +#define RMR_RESET_REQUEST_SHIFT 0x1u +#define RMR_WARM_RESET_CPU (1u << RMR_RESET_REQUEST_SHIFT) + /******************************************************************************* * Definitions of register offsets, fields and macros for CPU system * instructions. |