diff options
| author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2017-09-14 15:57:44 +0100 |
|---|---|---|
| committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2017-09-21 12:03:53 +0100 |
| commit | e47ac1fd634a3934d7d3ac446190b2f4bd8a640f (patch) | |
| tree | 4291bffc8b34a4d395bbee467ee5fcaff2bcdbeb /include/lib/aarch64 | |
| parent | df312c5a2b152953f755df9d979cff20afb7ef4b (diff) | |
Fix type of `unsigned long` constants
The type `unsigned long` is 32 bit wide in AArch32, but 64 bit wide in
AArch64. This is inconsistent and that's why we avoid using it as per
the Coding Guidelines. This patch changes all `UL` occurrences to `U`
or `ULL` depending on the context so that the size of the constant is
clear.
This problem affected the macro `BIT(nr)`. As long as this macro is used
to fill fields of registers, that's not a problem, since all registers
are 32 bit wide in AArch32 and 64 bit wide in AArch64. However, if the
macro is used to fill the fields of a 64-bit integer, it won't be able
to set the upper 32 bits in AArch32.
By changing the type of this macro to `unsigned long long` the behaviour
is always the same regardless of the architecture, as this type is
64-bit wide in both cases.
Some Tegra platform files have been modified by this patch.
Change-Id: I918264c03e7d691a931f0d1018df25a2796cc221
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'include/lib/aarch64')
| -rw-r--r-- | include/lib/aarch64/arch.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index e38a5307..83f072fc 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -312,7 +312,7 @@ /* * TCR defintions */ -#define TCR_EL3_RES1 ((1UL << 31) | (1UL << 23)) +#define TCR_EL3_RES1 ((U(1) << 31) | (U(1) << 23)) #define TCR_EL1_IPS_SHIFT U(32) #define TCR_EL3_PS_SHIFT U(16) |