diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2016-05-12 13:43:33 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-02-28 08:50:01 -0800 |
| commit | 018b84803d3766c0733e50dc514d5f4ffce77cca (patch) | |
| tree | b20ddd46f52d3523b93b4ef337f30f5d86efc2f2 /include/lib/cpus | |
| parent | 45eab456e6da0e79c51ffced6c3a46053a1adc70 (diff) | |
Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
This patch enables L2 ECC and Parity Protection for ARM Cortex-A57 CPUs
for Tegra SoCs.
Change-Id: I038fcd529991d0201a4951ce2730ab71b1c980f9
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'include/lib/cpus')
| -rw-r--r-- | include/lib/cpus/aarch64/cortex_a57.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a57.h b/include/lib/cpus/aarch64/cortex_a57.h index c5a218b7..9229a564 100644 --- a/include/lib/cpus/aarch64/cortex_a57.h +++ b/include/lib/cpus/aarch64/cortex_a57.h @@ -87,6 +87,8 @@ #define L2_DATA_RAM_LATENCY_3_CYCLES 0x2 #define L2_TAG_RAM_LATENCY_3_CYCLES 0x2 +#define L2_ECC_PARITY_PROTECTION_BIT (1 << 21) + /******************************************************************************* * L2 Extended Control register specific definitions. ******************************************************************************/ |