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authorAnson Huang <Anson.Huang@nxp.com>2019-11-22 14:04:55 +0800
committerAnson Huang <Anson.Huang@nxp.com>2019-12-13 10:41:30 +0800
commitd3150a3f33c225b852be8bd7e7b143616234d69b (patch)
tree1f2ebf3646073b586eb7977af729b47394ca2d6e /include/lib/psci/psci.h
parent81624751253d867ba9a3e5a8a0f4580b7b8cdb54 (diff)
gic: make sure ProcessorSleep bit clear successfully
GICR_WAKER.ProcessorSleep can only be set to zero when: — GICR_WAKER.Sleep bit[0] == 0. — GICR_WAKER.Quiescent bit[31] == 0. On some platforms, when system reboot with GIC in sleep mode but with power ON, such as on NXP's i.MX8QM, Linux kernel enters suspend but could be requested to reboot, and GIC is in sleep mode and it is inside a power domain which is ON in this scenario, when CPU reset, the GIC driver trys to set CORE's redistributor interface to awake, with GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31] both set, the ProcessorSleep bit[1] will never be clear and cause system hang. This patch makes sure GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31] are both zeor before clearing ProcessorSleep bit[1]. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'include/lib/psci/psci.h')
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