diff options
| author | John Tsichritzis <john.tsichritzis@arm.com> | 2018-07-23 09:11:59 +0100 |
|---|---|---|
| committer | John Tsichritzis <john.tsichritzis@arm.com> | 2018-08-17 10:34:43 +0100 |
| commit | 8a6771803fa2c629e624913a1c622df901efbde7 (patch) | |
| tree | 1b5d0a0f6285ddf8d6674fb208e3cf5d56ee03a7 /include/lib | |
| parent | 07da0bf9768d5fcceb1bf946e8e2f18d790c84be (diff) | |
DSU erratum 936184 workaround
If the system is in near idle conditions, this erratum could cause a
deadlock or data corruption. This patch applies the workaround that
prevents this.
This DSU erratum affects only the DSUs that contain the ACP interface
and it was fixed in r2p0. The workaround is applied only to the DSUs
that are actually affected.
Link to respective Arm documentation:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.epm138168/index.html
Change-Id: I033213b3077685130fc1e3f4f79c4d15d7483ec9
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
Diffstat (limited to 'include/lib')
| -rw-r--r-- | include/lib/cpus/aarch64/dsu_def.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/dsu_def.h b/include/lib/cpus/aarch64/dsu_def.h new file mode 100644 index 00000000..0e2d93a8 --- /dev/null +++ b/include/lib/cpus/aarch64/dsu_def.h @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef DSU_DEF_H +#define DSU_DEF_H + +#include <utils_def.h> + +/******************************************************************** + * DSU control registers definitions * + ********************************************************************/ +#define CLUSTERCFR_EL1 S3_0_C15_C3_0 +#define CLUSTERIDR_EL1 S3_0_C15_C3_1 +#define CLUSTERACTLR_EL1 S3_0_C15_C3_3 + +/******************************************************************** + * DSU control registers bit fields * + ********************************************************************/ +#define CLUSTERIDR_REV_SHIFT U(0) +#define CLUSTERIDR_REV_BITS U(4) +#define CLUSTERIDR_VAR_SHIFT U(4) +#define CLUSTERIDR_VAR_BITS U(4) +#define CLUSTERCFR_ACP_SHIFT U(11) + +/******************************************************************** + * Masks applied for DSU errata workarounds * + ********************************************************************/ +#define DSU_ERRATA_936184_MASK (ULL(0x3) << 15) + +#endif /* DSU_DEF_H */ |