diff options
author | Soby Mathew <soby.mathew@arm.com> | 2014-08-14 11:33:56 +0100 |
---|---|---|
committer | Dan Handley <dan.handley@arm.com> | 2014-08-20 19:13:25 +0100 |
commit | 9b4768417051ead50135d1d7675cab940d864e8d (patch) | |
tree | 3105204d317eb7516d184923a8ea66da3aa767f2 /include | |
parent | aecc0840805672279e4165f4d368a59b5c20771e (diff) |
Introduce framework for CPU specific operations
This patch introduces a framework which will allow CPUs to perform
implementation defined actions after a CPU reset, during a CPU or cluster power
down, and when a crash occurs. CPU specific reset handlers have been implemented
in this patch. Other handlers will be implemented in subsequent patches.
Also moved cpu_helpers.S to the new directory lib/cpus/aarch64/.
Change-Id: I1ca1bade4d101d11a898fb30fea2669f9b37b956
Diffstat (limited to 'include')
-rw-r--r-- | include/bl31/cpu_data.h | 13 | ||||
-rw-r--r-- | include/lib/aarch64/arch.h | 2 | ||||
-rw-r--r-- | include/lib/aarch64/cpu_macros.S | 65 |
3 files changed, 77 insertions, 3 deletions
diff --git a/include/bl31/cpu_data.h b/include/bl31/cpu_data.h index 355160b9..ba7ae063 100644 --- a/include/bl31/cpu_data.h +++ b/include/bl31/cpu_data.h @@ -32,14 +32,16 @@ #define __CPU_DATA_H__ /* Offsets for the cpu_data structure */ -#define CPU_DATA_CRASH_BUF_OFFSET 0x10 +#define CPU_DATA_CRASH_BUF_OFFSET 0x20 #if CRASH_REPORTING #define CPU_DATA_LOG2SIZE 7 #else #define CPU_DATA_LOG2SIZE 6 #endif /* need enough space in crash buffer to save 8 registers */ -#define CPU_DATA_CRASH_BUF_SIZE 64 +#define CPU_DATA_CRASH_BUF_SIZE 64 +#define CPU_DATA_CPU_OPS_PTR 0x10 + #ifndef __ASSEMBLY__ #include <arch_helpers.h> @@ -66,10 +68,11 @@ ******************************************************************************/ typedef struct cpu_data { void *cpu_context[2]; + uint64_t cpu_ops_ptr; + struct psci_cpu_data psci_svc_cpu_data; #if CRASH_REPORTING uint64_t crash_buf[CPU_DATA_CRASH_BUF_SIZE >> 3]; #endif - struct psci_cpu_data psci_svc_cpu_data; } __aligned(CACHE_WRITEBACK_GRANULE) cpu_data_t; #if CRASH_REPORTING @@ -82,6 +85,10 @@ CASSERT(CPU_DATA_CRASH_BUF_OFFSET == __builtin_offsetof CASSERT((1 << CPU_DATA_LOG2SIZE) == sizeof(cpu_data_t), assert_cpu_data_log2size_mismatch); +CASSERT(CPU_DATA_CPU_OPS_PTR == __builtin_offsetof + (cpu_data_t, cpu_ops_ptr), + assert_cpu_data_cpu_ops_ptr_offset_mismatch); + struct cpu_data *_cpu_data_by_index(uint32_t cpu_index); struct cpu_data *_cpu_data_by_mpidr(uint64_t mpidr); diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 04272082..bb33acba 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -35,6 +35,8 @@ /******************************************************************************* * MIDR bit definitions ******************************************************************************/ +#define MIDR_IMPL_MASK 0xff +#define MIDR_IMPL_SHIFT 0x18 #define MIDR_PN_MASK 0xfff #define MIDR_PN_SHIFT 0x4 #define MIDR_PN_AEM 0xd0f diff --git a/include/lib/aarch64/cpu_macros.S b/include/lib/aarch64/cpu_macros.S new file mode 100644 index 00000000..51c56e8d --- /dev/null +++ b/include/lib/aarch64/cpu_macros.S @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <arch.h> + +#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \ + (MIDR_PN_MASK << MIDR_PN_SHIFT) + + /* + * Define the offsets to the fields in cpu_ops structure. + */ + .struct 0 +CPU_MIDR: /* cpu_ops midr */ + .space 8 +/* Reset fn is needed in BL at reset vector */ +#if IMAGE_BL1 || (IMAGE_BL31 && RESET_TO_BL31) +CPU_RESET_FUNC: /* cpu_ops reset_func */ + .space 8 +#endif +CPU_OPS_SIZE = . + + /* + * Convenience macro to declare cpu_ops structure. + * Make sure the structure fields are as per the offsets + * defined above. + */ + .macro declare_cpu_ops _name:req, _midr:req, _noresetfunc = 0 + .section cpu_ops, "a"; .align 3 + .type cpu_ops_\_name, %object + .quad \_midr +#if IMAGE_BL1 || (IMAGE_BL31 && RESET_TO_BL31) + .if \_noresetfunc + .quad 0 + .else + .quad \_name\()_reset_func + .endif +#endif + .endm |