diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2017-07-18 16:12:45 +0100 |
|---|---|---|
| committer | Soby Mathew <soby.mathew@arm.com> | 2017-10-05 16:47:53 +0100 |
| commit | b258278eec8d8a7b7291d6d4ba03f21e4aac7d22 (patch) | |
| tree | 0c506fc912c3645eca05077f6542cc43804897d2 /include | |
| parent | ebf1ca10e466f39c45fa4ae4043fd53487d32362 (diff) | |
GICv3: ITS architectural save and restore helpers
This patch adds functions to save and restore GICv3 ITS registers during
system suspend. Please note that the power management of GIC ITS is
implementation defined. These functions only implements the
architectural part of the ITS power management and they do not restore
memory structures or register content required to support ITS. Even if
the ITS implementation stores structures in memory, an implementation
defined power down sequence is likely to be required to flush some
internal ITS caches to memory. If such implementation defined sequence
is not followed, the platform must ensure that the ITS is not power
gated during system suspend.
Change-Id: I5f31e5541975aa7dcaab69b0b7f67583c0e27678
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/drivers/arm/gicv3.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h index d20421d2..c52fe483 100644 --- a/include/drivers/arm/gicv3.h +++ b/include/drivers/arm/gicv3.h @@ -165,6 +165,23 @@ #define IAR1_EL1_INTID_SHIFT 0 #define IAR1_EL1_INTID_MASK 0xffffff +/***************************************************************************** + * GICv3 ITS registers and constants + *****************************************************************************/ + +#define GITS_CTLR 0x0 +#define GITS_IIDR 0x4 +#define GITS_TYPER 0x8 +#define GITS_CBASER 0x80 +#define GITS_CWRITER 0x88 +#define GITS_CREADR 0x90 +#define GITS_BASER 0x100 + +/* GITS_CTLR bit definitions */ +#define GITS_CTLR_ENABLED_BIT 1 +#define GITS_CTLR_QUIESCENT_SHIFT 31 +#define GITS_CTLR_QUIESCENT_BIT (1U << GITS_CTLR_QUIESCENT_SHIFT) + #ifndef __ASSEMBLY__ #include <gic_common.h> @@ -293,6 +310,16 @@ typedef struct gicv3_dist_ctx { uint32_t gicd_nsacr[GICD_NUM_REGS(NSACR)]; } gicv3_dist_ctx_t; +typedef struct gicv3_its_ctx { + /* 64 bits registers */ + uint64_t gits_cbaser; + uint64_t gits_cwriter; + uint64_t gits_baser[8]; + + /* 32 bits registers */ + uint32_t gits_ctlr; +} gicv3_its_ctx_t; + /******************************************************************************* * GICv3 EL3 driver API ******************************************************************************/ @@ -319,6 +346,8 @@ void gicv3_distif_post_restore(unsigned int proc_num); void gicv3_distif_pre_save(unsigned int proc_num); void gicv3_rdistif_init_restore(unsigned int proc_num, const gicv3_redist_ctx_t * const rdist_ctx); void gicv3_rdistif_save(unsigned int proc_num, gicv3_redist_ctx_t * const rdist_ctx); +void gicv3_its_save_disable(uintptr_t gits_base, gicv3_its_ctx_t * const its_ctx); +void gicv3_its_restore(uintptr_t gits_base, const gicv3_its_ctx_t * const its_ctx); #endif /* __ASSEMBLY__ */ #endif /* __GICV3_H__ */ |