diff options
| author | Vikram Kanigiri <vikram.kanigiri@arm.com> | 2015-06-24 17:51:09 +0100 |
|---|---|---|
| committer | Vikram Kanigiri <vikram.kanigiri@arm.com> | 2015-09-01 14:11:09 +0100 |
| commit | a7270d35d71bbaa00c41848164c827a12846e117 (patch) | |
| tree | ac22f86cfd3da3f2399413031c5725099400033f /include | |
| parent | 468f808cb8967ffe69505a67c03405f1b1dc7bc6 (diff) | |
Configure all secure interrupts on ARM platforms
ARM TF configures all interrupts as non-secure except those which
are present in irq_sec_array. This patch updates the irq_sec_array
with the missing secure interrupts for ARM platforms.
It also updates the documentation to be inline with the latest
implementation.
Fixes ARM-software/tf-issues#312
Change-Id: I39956c56a319086e3929d1fa89030b4ec4b01fcc
Diffstat (limited to 'include')
| -rw-r--r-- | include/plat/arm/css/common/css_def.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h index e3dd2b0f..157a22f4 100644 --- a/include/plat/arm/css/common/css_def.h +++ b/include/plat/arm/css/common/css_def.h @@ -58,10 +58,9 @@ /* Interrupt handling constants */ #define CSS_IRQ_MHU 69 #define CSS_IRQ_GPU_SMMU_0 71 -#define CSS_IRQ_GPU_SMMU_1 73 -#define CSS_IRQ_ETR_SMMU 75 #define CSS_IRQ_TZC 80 #define CSS_IRQ_TZ_WDOG 86 +#define CSS_IRQ_SEC_SYS_TIMER 91 /* * SCP <=> AP boot configuration |