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| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-01-05 10:37:21 +0000 |
|---|---|---|
| committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-03-02 11:00:20 +0000 |
| commit | 25a93f7cd181ca79a631864b7c076fa7106f4365 (patch) | |
| tree | 0c78e4a1940cc16e9684cbd4f758d7b559f1da1c /lib/psci/psci_common.c | |
| parent | 3c251af392f2dfeedfe9c4595a8a33188c1d1d14 (diff) | |
Enable data caches early with hardware-assisted coherency
At present, warm-booted CPUs keep their caches disabled when enabling
MMU, and remains so until they enter coherency later.
On systems with hardware-assisted coherency, for which
HW_ASSISTED_COHERENCY build flag would be enabled, warm-booted CPUs can
have both caches and MMU enabled at once.
Change-Id: Icb0adb026e01aecf34beadf49c88faa9dd368327
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'lib/psci/psci_common.c')
0 files changed, 0 insertions, 0 deletions