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| author | Caesar Wang <wxt@rock-chips.com> | 2016-09-13 11:15:00 +0800 |
|---|---|---|
| committer | Caesar Wang <wxt@rock-chips.com> | 2016-09-13 14:18:40 +0800 |
| commit | 0587788abcd4daf98a8bef1f9545a9841e1015a8 (patch) | |
| tree | 68d212e885ebe6df87e4feddd1527807a5f354e3 /lib/psci/psci_main.c | |
| parent | 4531d3c9ab409fc5df2d865620587a12f9fe7f3c (diff) | |
rockchip: fixes the gic panic for rk3399 resume
We make sure the resuming of gic need to be enabled.
Otherwise, The resume will hit the below panic.
...
[ 24.230541] CPU0: update max cpu_capacity 451
[ 24.236029] CPU5: update max cpu_capacity 1024
[ 24.236046] CPU4: shutdown
[ 24.243205] psci: CPU4 killed.
[ 24.258730] CPU5: shutdown
[ 24.261472] psci: CPU5 killed.
[ 24.270417] GIC: unable to set SRE (disabled at EL2), panic ahead
[ 24.270417] cat[7801]: undefined instruction: pc=ffffffc0004e65d0
[ 24.270417] Code: b0003940 91274400 97f871af d2801e00 (d5184600)
[ 24.270417] Internal error: Oops - undefined instruction: 0 [#1] PREEMPT
Change-Id: Ie9542c8d5768ba0accfa073453da8bfe06d4f921
Diffstat (limited to 'lib/psci/psci_main.c')
0 files changed, 0 insertions, 0 deletions