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author | Soby Mathew <soby.mathew@arm.com> | 2016-05-05 14:11:23 +0100 |
---|---|---|
committer | Soby Mathew <soby.mathew@arm.com> | 2016-08-10 14:43:48 +0100 |
commit | 727e5238fa3e9220d6a2718fab3b1df22af1dc61 (patch) | |
tree | ac9260c77ac755b99c1727c836e1e314f8ce0505 /lib/psci/psci_setup.c | |
parent | e33b78a658bd54a815c780e17c2d0073db6f59db (diff) |
AArch32: Add support to PSCI lib
This patch adds AArch32 support to PSCI library, as follows :
* The `psci_helpers.S` is implemented for AArch32.
* AArch32 version of internal helper function `psci_get_ns_ep_info()` is
defined.
* The PSCI Library is responsible for the Non Secure context initialization.
Hence a library interface `psci_prepare_next_non_secure_ctx()` is introduced
to enable EL3 runtime firmware to initialize the non secure context without
invoking context management library APIs.
Change-Id: I25595b0cc2dbfdf39dbf7c589b875cba33317b9d
Diffstat (limited to 'lib/psci/psci_setup.c')
-rw-r--r-- | lib/psci/psci_setup.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/lib/psci/psci_setup.c b/lib/psci/psci_setup.c index d35e0001..20d06352 100644 --- a/lib/psci/psci_setup.c +++ b/lib/psci/psci_setup.c @@ -278,3 +278,15 @@ void psci_arch_setup(void) /* Initialize the cpu_ops pointer. */ init_cpu_ops(); } + +/****************************************************************************** + * PSCI Library interface to initialize the cpu context for the next non + * secure image during cold boot. The relevant registers in the cpu context + * need to be retrieved and programmed on return from this interface. + *****************************************************************************/ +void psci_prepare_next_non_secure_ctx(entry_point_info_t *next_image_info) +{ + assert(GET_SECURITY_STATE(next_image_info->h.attr) == NON_SECURE); + cm_init_my_context(next_image_info); + cm_prepare_el3_exit(NON_SECURE); +} |