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| author | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-01-08 13:57:39 +0000 |
|---|---|---|
| committer | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-01-29 09:58:57 +0000 |
| commit | 1d6d47a82a9aafc17d084738f79dc0c8d40dff45 (patch) | |
| tree | bf54cdd51c234867c158e65bfb5ca6b1422590df /lib/psci/psci_setup.c | |
| parent | d9bd656cf5a4d0c21597a956c3711d08626ecfd0 (diff) | |
Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75
This patch implements a fast path for this SMC call on affected PEs by
detecting and returning immediately after executing the workaround.
NOTE: The MMU disable/enable workaround now assumes that the MMU was
enabled on entry to EL3. This is a valid assumption as the code turns
on the MMU after reset and leaves it on until the core powers off.
Change-Id: I13c336d06a52297620a9760fb2461b4d606a30b3
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Diffstat (limited to 'lib/psci/psci_setup.c')
0 files changed, 0 insertions, 0 deletions