diff options
author | Bai Ping <ping.bai@nxp.com> | 2018-10-29 18:33:58 +0800 |
---|---|---|
committer | Bai Ping <ping.bai@nxp.com> | 2018-11-02 17:33:33 +0800 |
commit | c290a9e1664628a13a5e75e2400c5cc17882fbba (patch) | |
tree | 4d7eddc29a48943019ec178ad9dcff41af90496a /plat/imx/common/imx8m/lpddr4_retention.c | |
parent | b6e9e2d823b1ff5f4e83fa34541003df0e70e1c9 (diff) |
plat: imx8mq: refact the dram low power code
refact the dram low power related code to make it more
friendly for different dram config or different board.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'plat/imx/common/imx8m/lpddr4_retention.c')
-rw-r--r-- | plat/imx/common/imx8m/lpddr4_retention.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/plat/imx/common/imx8m/lpddr4_retention.c b/plat/imx/common/imx8m/lpddr4_retention.c index c44dd291..205dbbff 100644 --- a/plat/imx/common/imx8m/lpddr4_retention.c +++ b/plat/imx/common/imx8m/lpddr4_retention.c @@ -92,7 +92,7 @@ void lpddr4_enter_retention(void) for (i=0; i<20; i++){ } -#ifdef M850D +#if defined(PLAT_IMX8M) /* pwrdnreqn_async adbm/adbs of ddr */ mmio_clrbits_32(GPC_PU_PWRHSK, (1 << 1)); do { @@ -140,7 +140,7 @@ void lpddr4_exit_retention(void) } /*assert all reset */ -#ifdef M850D +#if defined(PLAT_IMX8M) mmio_write_32(SRC_DDRC_RCR_ADDR+0x4, 0x8F000003); // assert [0]src_system_rst_b! mmio_write_32(SRC_DDRC_RCR_ADDR, 0x8F00000F); // assert [0]ddr1_preset_n, [1]ddr1_core_reset_n, [2]ddr1_phy_reset, [3]ddr1_phy_pwrokin_n, mmio_write_32(SRC_DDRC_RCR_ADDR+0x4, 0x8F000000); // deassert [4]src_system_rst_b! |