diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2018-10-12 11:30:28 +0800 |
---|---|---|
committer | Anson Huang <Anson.Huang@nxp.com> | 2018-10-12 12:33:47 +0800 |
commit | 7fb5f5e8e7bf27a02c8bb1ebaddbb484b20d8b7c (patch) | |
tree | 63f0a8cc7ba685bbd3317a993788ca7305d5f559 /plat/imx | |
parent | e6db8a671bf8bbc107925243e394b6c5eb609fe2 (diff) |
imx8qm: keep A53 cluster power on for cache coherency issue
A53 cluster cannot be power gated unless the entire
multi-cluster (A53 + A72 + CCI) is gated off. Root cause
still TBD, this patch adds temporary workaround to
ONLY allow A53 power off when system suspend.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'plat/imx')
-rw-r--r-- | plat/imx/imx8qm/imx8qm_psci.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/plat/imx/imx8qm/imx8qm_psci.c b/plat/imx/imx8qm/imx8qm_psci.c index 4cfa7b69..34e9d397 100644 --- a/plat/imx/imx8qm/imx8qm_psci.c +++ b/plat/imx/imx8qm/imx8qm_psci.c @@ -245,6 +245,8 @@ void imx_domain_suspend(const psci_power_state_t *target_state) sc_pm_req_cpu_low_power_mode(ipc_handle, ap_core_index[cpu_id + 4], SC_PM_PW_MODE_OFF, SC_PM_WAKE_SRC_SCU); } + + sc_pm_req_low_power_mode(ipc_handle, SC_R_A53, SC_PM_PW_MODE_OFF); } void imx_domain_suspend_finish(const psci_power_state_t *target_state) @@ -260,6 +262,8 @@ void imx_domain_suspend_finish(const psci_power_state_t *target_state) else sc_pm_req_cpu_low_power_mode(ipc_handle, ap_core_index[cpu_id + 4], SC_PM_PW_MODE_ON, SC_PM_WAKE_SRC_GIC); + sc_pm_req_low_power_mode(ipc_handle, SC_R_A53, SC_PM_PW_MODE_ON); + /* Put GIC/IRQSTR back to high power mode. */ sc_pm_set_resource_power_mode(ipc_handle, SC_R_GIC, SC_PM_PW_MODE_ON); @@ -328,9 +332,8 @@ int plat_setup_psci_ops(uintptr_t sec_entrypoint, else a72_cpu_on_number++; - /* request low power mode for cluster/cci, only need to do once */ + /* due to cache coherency issue, A53 can ONLY be off when suspend */ sc_pm_req_low_power_mode(ipc_handle, SC_R_A72, SC_PM_PW_MODE_OFF); - sc_pm_req_low_power_mode(ipc_handle, SC_R_A53, SC_PM_PW_MODE_OFF); sc_pm_req_low_power_mode(ipc_handle, SC_R_CCI, SC_PM_PW_MODE_OFF); /* Request RUN and LP modes for DDR, system interconnect etc. */ |