summaryrefslogtreecommitdiff
path: root/plat/nvidia/tegra/common
diff options
context:
space:
mode:
authorVarun Wadekar <vwadekar@nvidia.com>2017-04-17 11:54:33 -0700
committerVarun Wadekar <vwadekar@nvidia.com>2017-04-17 11:54:33 -0700
commitc76c1b71ab159c65f4eef7798096d67857527299 (patch)
tree9c3a3a887cbfc5d7ef14c09a5f3faa3cdbbd676f /plat/nvidia/tegra/common
parentf3c8ec672ed8d3b4c56a20c4e74bf7a7ea0e545d (diff)
Tegra186: Support AARCH32/64 encoding for MCE calls
On Tegra systems, there are multiple software components that require to interact with MCE. The components can either be 32-bit or 64-bit payloads. This patch supports MCE SMC functions ID for AARCH32 and AARCH64 architectures to support such clients. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/common')
-rw-r--r--plat/nvidia/tegra/common/tegra_sip_calls.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/nvidia/tegra/common/tegra_sip_calls.c b/plat/nvidia/tegra/common/tegra_sip_calls.c
index b01dcb0c..1e5423db 100644
--- a/plat/nvidia/tegra/common/tegra_sip_calls.c
+++ b/plat/nvidia/tegra/common/tegra_sip_calls.c
@@ -86,7 +86,7 @@ uint64_t tegra_sip_handler(uint32_t smc_fid,
/* Check if this is a SoC specific SiP */
err = plat_sip_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags);
if (err == 0)
- SMC_RET1(handle, err);
+ SMC_RET1(handle, (uint64_t)err);
switch (smc_fid) {