diff options
author | Varun Wadekar <vwadekar@nvidia.com> | 2017-06-07 09:57:42 -0700 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-06-14 14:59:07 -0700 |
commit | 6311f63de02ee04d93016242977ade4727089de8 (patch) | |
tree | 831af3c8fefba670513cfc5d4b1838df1266b3ed /plat/nvidia | |
parent | dfe30efb1d5ae7db8f216bb1d5f2c2b58afec33b (diff) |
Tegra: enable 'signed-comparison' compilation warning/errors
This patch enables the 'sign-compare' flag, to enable warning/errors
for comparisons between signed/unsigned variables. The warning has
been enabled for all the Tegra platforms, to start with.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia')
-rw-r--r-- | plat/nvidia/tegra/common/tegra_pm.c | 2 | ||||
-rw-r--r-- | plat/nvidia/tegra/platform.mk | 3 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t132/plat_psci_handlers.c | 2 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t186/drivers/mce/ari.c | 4 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c | 4 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t186/plat_psci_handlers.c | 4 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t210/plat_psci_handlers.c | 2 |
7 files changed, 12 insertions, 9 deletions
diff --git a/plat/nvidia/tegra/common/tegra_pm.c b/plat/nvidia/tegra/common/tegra_pm.c index 94450191..6f841ef0 100644 --- a/plat/nvidia/tegra/common/tegra_pm.c +++ b/plat/nvidia/tegra/common/tegra_pm.c @@ -107,7 +107,7 @@ plat_local_state_t tegra_soc_get_target_pwr_state(unsigned int lvl, void tegra_get_sys_suspend_power_state(psci_power_state_t *req_state) { /* all affinities use system suspend state id */ - for (int i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) + for (uint32_t i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) req_state->pwr_domain_state[i] = PSTATE_ID_SOC_POWERDN; } diff --git a/plat/nvidia/tegra/platform.mk b/plat/nvidia/tegra/platform.mk index f5af4081..eaf10914 100644 --- a/plat/nvidia/tegra/platform.mk +++ b/plat/nvidia/tegra/platform.mk @@ -34,3 +34,6 @@ include ${SOC_DIR}/platform_${TARGET_SOC}.mk # modify BUILD_PLAT to point to SoC specific build directory BUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_SOC}/${BUILD_TYPE} + +# enable signed comparison checks +CFLAGS += -Wsign-compare diff --git a/plat/nvidia/tegra/soc/t132/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t132/plat_psci_handlers.c index 56ce91be..9b7dc853 100644 --- a/plat/nvidia/tegra/soc/t132/plat_psci_handlers.c +++ b/plat/nvidia/tegra/soc/t132/plat_psci_handlers.c @@ -49,7 +49,7 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state, } /* Set lower power states to PLAT_MAX_OFF_STATE */ - for (int i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++) + for (uint32_t i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++) req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; /* Set the SYSTEM_SUSPEND state-id */ diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c index 4765ba00..05b30fc9 100644 --- a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c +++ b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c @@ -291,7 +291,7 @@ int ari_is_sc7_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time) int ari_online_core(uint32_t ari_base, uint32_t core) { - int cpu = read_mpidr() & MPIDR_CPU_MASK; + uint32_t cpu = read_mpidr() & MPIDR_CPU_MASK; int cluster = (read_mpidr() & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; @@ -300,7 +300,7 @@ int ari_online_core(uint32_t ari_base, uint32_t core) cpu |= (cluster << 2); /* sanity check target core id */ - if ((core >= MCE_CORE_ID_MAX) || (cpu == core)) { + if ((core >= (uint32_t)MCE_CORE_ID_MAX) || (cpu == core)) { ERROR("%s: unsupported core id (%d)\n", __func__, core); return EINVAL; } diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c b/plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c index 0be1af1a..8c6f67c0 100644 --- a/plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c +++ b/plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c @@ -168,11 +168,11 @@ int nvg_is_sc7_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time) int nvg_online_core(uint32_t ari_base, uint32_t core) { - int cpu = read_mpidr() & MPIDR_CPU_MASK; + uint32_t cpu = read_mpidr() & MPIDR_CPU_MASK; int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; /* sanity check code id */ - if ((core >= MCE_CORE_ID_MAX) || (cpu == core)) { + if ((core >= (uint32_t)MCE_CORE_ID_MAX) || (cpu == core)) { ERROR("%s: unsupported core id (%d)\n", __func__, core); return EINVAL; } diff --git a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c index 44b99dc4..095614e4 100644 --- a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c +++ b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c @@ -256,8 +256,8 @@ int tegra_soc_pwr_domain_power_down_wfi(const psci_power_state_t *target_state) int tegra_soc_pwr_domain_on(u_register_t mpidr) { - int target_cpu = mpidr & MPIDR_CPU_MASK; - int target_cluster = (mpidr & MPIDR_CLUSTER_MASK) >> + uint32_t target_cpu = mpidr & MPIDR_CPU_MASK; + uint32_t target_cluster = (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS; if (target_cluster > MPIDR_AFFLVL1) { diff --git a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c index bcaade64..3dff6539 100644 --- a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c +++ b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c @@ -60,7 +60,7 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state, /* * System powerdown request only for afflvl 2 */ - for (int i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++) + for (uint32_t i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++) req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = |