diff options
author | Peng Fan <peng.fan@nxp.com> | 2018-01-11 13:39:26 +0800 |
---|---|---|
committer | Abel Vesa <abel.vesa@nxp.com> | 2018-06-11 10:33:02 +0300 |
commit | c541784adaa45d88989ab05b075827da0cfd4df2 (patch) | |
tree | aed1d3407a36e789b32deefc4147455a119faa1a /plat | |
parent | 6c0b5030913b7886bcd75247459facb87536cdc3 (diff) |
imx8mq: move stack to ocram_s
Add an ocram_s mmap entry
Merge mmap entry to use 2MB aligned base and size to shrink the final
mmu table size.
Move stack to ocram_s
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'plat')
-rw-r--r-- | plat/imx/imx8mq/imx8m_bl31_setup.c | 24 | ||||
-rw-r--r-- | plat/imx/imx8mq/include/platform_def.h | 8 | ||||
-rw-r--r-- | plat/imx/imx8mq/platform.mk | 2 |
3 files changed, 22 insertions, 12 deletions
diff --git a/plat/imx/imx8mq/imx8m_bl31_setup.c b/plat/imx/imx8mq/imx8m_bl31_setup.c index d1bf2ffc..8e718d61 100644 --- a/plat/imx/imx8mq/imx8m_bl31_setup.c +++ b/plat/imx/imx8mq/imx8m_bl31_setup.c @@ -217,26 +217,28 @@ void bl31_plat_arch_setup(void) mmap_add_region(0x100000, 0x100000, 0x10000, MT_MEMORY | MT_RW); + mmap_add_region(0x180000, 0x180000, 0x8000, + MT_MEMORY | MT_RW); + mmap_add_region(0x40000000, 0x40000000, 0xc0000000, MT_MEMORY | MT_RW | MT_NS); mmap_add_region(BL31_BASE, BL31_BASE, BL31_RO_LIMIT - BL31_RO_BASE, MT_MEMORY | MT_RO); - mmap_add_region(IMX_BOOT_UART_BASE, IMX_BOOT_UART_BASE, - 0x1000, MT_DEVICE | MT_RW); mmap_add_region(IMX_ROM_BASE, IMX_ROM_BASE, 0x20000, MT_MEMORY | MT_RO); - mmap_add_region(IMX_NOC_BASE, IMX_NOC_BASE, 0x100000, MT_DEVICE | MT_RW); - /* map the AIPS1 */ - mmap_add_region(IMX_AIPS1_BASE, IMX_AIPS1_BASE, 0x200000, MT_DEVICE | MT_RW); - mmap_add_region(IMX_AIPS3_ARB_BASE, IMX_AIPS3_ARB_BASE, 0x400000, MT_DEVICE | MT_RW); - mmap_add_region(PLAT_GICD_BASE, PLAT_GICD_BASE, 0x80000, - MT_DEVICE | MT_RW); - mmap_add_region(PLAT_GICR_BASE, PLAT_GICR_BASE, 0x80000, + /* Map GPV */ + mmap_add_region(0x32000000, 0x32000000, 0x800000, MT_DEVICE | MT_RW); + /* Map AIPS */ + mmap_add_region(IMX_AIPS_BASE, IMX_AIPS_BASE, IMX_AIPS_SIZE, MT_DEVICE | MT_RW); + + /* Map GIC */ + mmap_add_region(0x38800000, 0x38800000, 0x200000, MT_DEVICE | MT_RW); - mmap_add_region(IMX_DDR_IPS_BASE, IMX_DDR_IPS_BASE, 0x8000000, MT_DEVICE | MT_RW); - mmap_add_region(IMX_DDRPHY_BASE, IMX_DDRPHY_BASE, 0x2000000, MT_DEVICE | MT_RW); + /* Map DDRC/PHY/PERF */ + mmap_add_region(0x3c000000, 0x3c000000, 0xC000000, MT_DEVICE | MT_RW); + #if USE_COHERENT_MEM mmap_add_region(BL31_COHERENT_RAM_BASE, BL31_COHERENT_RAM_BASE, BL31_COHERENT_RAM_LIMIT - BL31_COHERENT_RAM_BASE, diff --git a/plat/imx/imx8mq/include/platform_def.h b/plat/imx/imx8mq/include/platform_def.h index f72f34ec..3bebf332 100644 --- a/plat/imx/imx8mq/include/platform_def.h +++ b/plat/imx/imx8mq/include/platform_def.h @@ -38,7 +38,7 @@ #define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32) #define MAX_XLAT_TABLES 4 -#define MAX_MMAP_REGIONS 13 +#define MAX_MMAP_REGIONS 14 #define IMX_BOOT_UART_BASE 0x30860000 #define IMX_BOOT_UART_CLK_IN_HZ 25000000 /* Select 25Mhz oscillator */ @@ -46,6 +46,8 @@ #define PLAT__CRASH_UART_CLK_IN_HZ 25000000 #define IMX_CONSOLE_BAUDRATE 115200 +#define IMX_AIPS_BASE 0x30200000 +#define IMX_AIPS_SIZE 0xC00000 #define IMX_AIPS1_BASE 0x30200000 #define IMX_AIPS3_ARB_BASE 0x30800000 #define IMX_ANAMIX_BASE 0x30360000 @@ -63,6 +65,10 @@ #define IMX_DDR_IPS_BASE 0x3d000000 #define IMX_ROM_BASE 0x0 +#define OCRAM_S_BASE 0x00180000 +#define OCRAM_S_SIZE 0x8000 +#define OCRAM_S_LIMIT (OCRAM_S_BASE + OCRAM_S_SIZE) + #define COUNTER_FREQUENCY 8000000 /* 8MHz */ #define DEBUG_CONSOLE 0 diff --git a/plat/imx/imx8mq/platform.mk b/plat/imx/imx8mq/platform.mk index 5cb8b98a..e711ea7c 100644 --- a/plat/imx/imx8mq/platform.mk +++ b/plat/imx/imx8mq/platform.mk @@ -33,7 +33,9 @@ MULTI_CONSOLE_API := 1 RESET_TO_BL31 := 1 ERROR_DEPRECATED := 1 XLAT_TABLE_IN_OCRAM_S := 1 +STACK_IN_OCRAM_S := 1 ifneq (${SPD},none) $(eval $(call add_define,TEE_IMX8)) endif $(eval $(call add_define,XLAT_TABLE_IN_OCRAM_S)) +$(eval $(call add_define,STACK_IN_OCRAM_S)) |