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-rw-r--r--bl31/aarch64/crash_reporting.S7
-rw-r--r--docs/porting-guide.md19
-rw-r--r--include/plat/arm/common/aarch64/cci_macros.S2
-rw-r--r--include/plat/arm/css/common/aarch64/css_macros.S2
-rw-r--r--plat/arm/board/fvp/include/plat_macros.S8
-rw-r--r--plat/arm/board/juno/include/plat_macros.S16
-rw-r--r--plat/mediatek/mt8173/include/plat_macros.S25
-rw-r--r--plat/nvidia/tegra/include/plat_macros.S12
-rw-r--r--plat/rockchip/common/include/plat_macros.S23
-rw-r--r--plat/xilinx/zynqmp/include/plat_macros.S11
10 files changed, 49 insertions, 76 deletions
diff --git a/bl31/aarch64/crash_reporting.S b/bl31/aarch64/crash_reporting.S
index b22ce71e..7f5a86b0 100644
--- a/bl31/aarch64/crash_reporting.S
+++ b/bl31/aarch64/crash_reporting.S
@@ -346,11 +346,8 @@ func do_crash_reporting
bl do_cpu_reg_dump
bl str_in_crash_buf_print
- /* Print the gic registers */
- plat_print_gic_regs
-
- /* Print the interconnect registers */
- plat_print_interconnect_regs
+ /* Print some platform registers */
+ plat_crash_print_regs
/* Done reporting */
bl plat_panic_handler
diff --git a/docs/porting-guide.md b/docs/porting-guide.md
index 5e148232..0d713c4a 100644
--- a/docs/porting-guide.md
+++ b/docs/porting-guide.md
@@ -489,20 +489,15 @@ Each platform must ensure a file of this name is in the system include path with
the following macro defined. In the ARM development platforms, this file is
found in `plat/arm/board/<plat_name>/include/plat_macros.S`.
-* **Macro : plat_print_gic_regs**
+* **Macro : plat_crash_print_regs**
- This macro allows the crash reporting routine to print GIC registers
- in case of an unhandled exception in BL31. This aids in debugging and
- this macro can be defined to be empty in case GIC register reporting is
- not desired.
-
-* **Macro : plat_print_interconnect_regs**
-
- This macro allows the crash reporting routine to print interconnect
+ This macro allows the crash reporting routine to print relevant platform
registers in case of an unhandled exception in BL31. This aids in debugging
- and this macro can be defined to be empty in case interconnect register
- reporting is not desired. In ARM standard platforms, the CCI snoop
- control registers are reported.
+ and this macro can be defined to be empty in case register reporting is not
+ desired.
+
+ For instance, GIC or interconnect registers may be helpful for
+ troubleshooting.
2.2 Handling Reset
diff --git a/include/plat/arm/common/aarch64/cci_macros.S b/include/plat/arm/common/aarch64/cci_macros.S
index 40f9d7e0..902fb159 100644
--- a/include/plat/arm/common/aarch64/cci_macros.S
+++ b/include/plat/arm/common/aarch64/cci_macros.S
@@ -44,7 +44,7 @@ cci_iface_regs:
* Clobbers: x0 - x9, sp
* ------------------------------------------------
*/
- .macro plat_print_interconnect_regs
+ .macro print_cci_regs
adr x6, cci_iface_regs
/* Store in x7 the base address of the first interface */
mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
diff --git a/include/plat/arm/css/common/aarch64/css_macros.S b/include/plat/arm/css/common/aarch64/css_macros.S
index 9124fdc7..518867bd 100644
--- a/include/plat/arm/css/common/aarch64/css_macros.S
+++ b/include/plat/arm/css/common/aarch64/css_macros.S
@@ -40,7 +40,7 @@
* Clobbers: x0 - x10, x16, x17, sp
* ---------------------------------------------
*/
- .macro plat_print_gic_regs
+ .macro css_print_gic_regs
mov_imm x16, PLAT_ARM_GICD_BASE
mov_imm x17, PLAT_ARM_GICC_BASE
arm_print_gic_regs
diff --git a/plat/arm/board/fvp/include/plat_macros.S b/plat/arm/board/fvp/include/plat_macros.S
index df66a520..e43c7acf 100644
--- a/plat/arm/board/fvp/include/plat_macros.S
+++ b/plat/arm/board/fvp/include/plat_macros.S
@@ -37,12 +37,13 @@
/* ---------------------------------------------
* The below required platform porting macro
- * prints out relevant GIC registers whenever an
- * unhandled exception is taken in BL31.
+ * prints out relevant GIC and CCI registers
+ * whenever an unhandled exception is taken in
+ * BL31.
* Clobbers: x0 - x10, x16, x17, sp
* ---------------------------------------------
*/
- .macro plat_print_gic_regs
+ .macro plat_crash_print_regs
/*
* Detect if we're using the base memory map or
* the legacy VE memory map
@@ -63,6 +64,7 @@ use_ve_mmap:
mov_imm x16, VE_GICD_BASE
print_gic_regs:
arm_print_gic_regs
+ print_cci_regs
.endm
#endif /* __PLAT_MACROS_S__ */
diff --git a/plat/arm/board/juno/include/plat_macros.S b/plat/arm/board/juno/include/plat_macros.S
index d2a88edb..bb42bca4 100644
--- a/plat/arm/board/juno/include/plat_macros.S
+++ b/plat/arm/board/juno/include/plat_macros.S
@@ -33,10 +33,16 @@
#include <cci_macros.S>
#include <css_macros.S>
-/*
- * Required platform porting macros
- * (Provided by included headers)
- */
-
+ /* ---------------------------------------------
+ * The below required platform porting macro
+ * prints out relevant platform registers
+ * whenever an unhandled exception is taken in
+ * BL31.
+ * ---------------------------------------------
+ */
+ .macro plat_crash_print_regs
+ css_print_gic_regs
+ print_cci_regs
+ .endm
#endif /* __PLAT_MACROS_S__ */
diff --git a/plat/mediatek/mt8173/include/plat_macros.S b/plat/mediatek/mt8173/include/plat_macros.S
index 0e34b197..018a790a 100644
--- a/plat/mediatek/mt8173/include/plat_macros.S
+++ b/plat/mediatek/mt8173/include/plat_macros.S
@@ -43,14 +43,18 @@ newline:
spacer:
.asciz ":\t\t0x"
+.section .rodata.cci_reg_name, "aS"
+cci_iface_regs:
+ .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
+
/* ---------------------------------------------
- * The below macro prints out relevant GIC
- * registers whenever an unhandled exception is
- * taken in BL3-1.
+ * The below macro prints out relevant GIC and
+ * CCI registers whenever an unhandled exception
+ * is taken in BL3-1.
* Clobbers: x0 - x10, x16, x17, sp
* ---------------------------------------------
*/
- .macro plat_print_gic_regs
+ .macro plat_crash_print_regs
mov_imm x16, BASE_GICD_BASE
mov_imm x17, BASE_GICC_BASE
/* Load the gicc reg list to x6 */
@@ -82,20 +86,7 @@ gicd_ispendr_loop:
bl asm_print_str
b gicd_ispendr_loop
exit_print_gic_regs:
- .endm
-.section .rodata.cci_reg_name, "aS"
-cci_iface_regs:
- .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
-
- /* ------------------------------------------------
- * The below macro prints out relevant interconnect
- * registers whenever an unhandled exception is
- * taken in BL3-1.
- * Clobbers: x0 - x9, sp
- * ------------------------------------------------
- */
- .macro plat_print_interconnect_regs
adr x6, cci_iface_regs
/* Store in x7 the base address of the first interface */
mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
diff --git a/plat/nvidia/tegra/include/plat_macros.S b/plat/nvidia/tegra/include/plat_macros.S
index 0868b416..1afe4545 100644
--- a/plat/nvidia/tegra/include/plat_macros.S
+++ b/plat/nvidia/tegra/include/plat_macros.S
@@ -50,7 +50,7 @@ spacer:
* taken in BL31.
* ---------------------------------------------
*/
-.macro plat_print_gic_regs
+.macro plat_crash_print_regs
mov_imm x16, TEGRA_GICC_BASE
cbz x16, 1f
/* gicc base address is now in x16 */
@@ -81,14 +81,4 @@ spacer:
1:
.endm
-/* ------------------------------------------------
- * The below required platform porting macro prints
- * out relevant interconnect registers whenever an
- * unhandled exception is taken in BL3-1.
- * ------------------------------------------------
- */
-.macro plat_print_interconnect_regs
- nop
-.endm
-
#endif /* __PLAT_MACROS_S__ */
diff --git a/plat/rockchip/common/include/plat_macros.S b/plat/rockchip/common/include/plat_macros.S
index ce68cf16..dcc959f8 100644
--- a/plat/rockchip/common/include/plat_macros.S
+++ b/plat/rockchip/common/include/plat_macros.S
@@ -54,15 +54,19 @@ newline:
spacer:
.asciz ":\t\t0x"
+.section .rodata.cci_reg_name, "aS"
+cci_iface_regs:
+ .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
+
/* ---------------------------------------------
* The below utility macro prints out relevant GIC
- * registers whenever an unhandled exception is
- * taken in BL31 on ARM standard platforms.
+ * and CCI registers whenever an unhandled
+ * exception is taken in BL31.
* Expects: GICD base in x16, GICC base in x17
* Clobbers: x0 - x10, sp
* ---------------------------------------------
*/
- .macro plat_print_gic_regs
+ .macro plat_crash_print_regs
mov_imm x16, PLAT_RK_GICD_BASE
mov_imm x17, PLAT_RK_GICC_BASE
@@ -119,20 +123,7 @@ gicd_ispendr_loop:
bl asm_print_str
b gicd_ispendr_loop
exit_print_gic_regs:
- .endm
-.section .rodata.cci_reg_name, "aS"
-cci_iface_regs:
- .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
-
- /* ------------------------------------------------
- * The below macro prints out relevant interconnect
- * registers whenever an unhandled exception is
- * taken in BL3-1.
- * Clobbers: x0 - x9, sp
- * ------------------------------------------------
- */
- .macro plat_print_interconnect_regs
#if PLATFORM_CLUSTER_COUNT > 1
adr x6, cci_iface_regs
/* Store in x7 the base address of the first interface */
diff --git a/plat/xilinx/zynqmp/include/plat_macros.S b/plat/xilinx/zynqmp/include/plat_macros.S
index e6c39bb5..f40beba8 100644
--- a/plat/xilinx/zynqmp/include/plat_macros.S
+++ b/plat/xilinx/zynqmp/include/plat_macros.S
@@ -36,16 +36,17 @@
/* ---------------------------------------------
* The below required platform porting macro
- * prints out relevant GIC registers whenever an
- * unhandled exception is taken in BL31.
- * Clobbers: x0 - x10, x16, sp
+ * prints out relevant GIC and CCI registers
+ * whenever an unhandled exception is taken in
+ * BL31.
+ * Clobbers: x0 - x10, x16, x17, sp
* ---------------------------------------------
*/
- .macro plat_print_gic_regs
+ .macro plat_crash_print_regs
mov_imm x17, BASE_GICC_BASE
mov_imm x16, BASE_GICD_BASE
arm_print_gic_regs
- mov x0, x1
+ print_cci_regs
.endm
#endif /* __PLAT_MACROS_S__ */
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-15 22:47:33 +0000