diff options
43 files changed, 374 insertions, 109 deletions
@@ -122,10 +122,6 @@ ifneq (${GENERATE_COT},0) FWU_FIP_DEPS += fwu_certificates endif -# For AArch32, enable new version of image loading. -ifeq (${ARCH},aarch32) - LOAD_IMAGE_V2 := 1 -endif ################################################################################ # Toolchain @@ -294,19 +290,15 @@ ifeq (${NEED_BL33},yes) endif endif -# TRUSTED_BOARD_BOOT is currently not supported when LOAD_IMAGE_V2 is enabled. -ifeq (${LOAD_IMAGE_V2},1) - ifeq (${TRUSTED_BOARD_BOOT},1) - $(error "TRUSTED_BOARD_BOOT is currently not supported \ - for LOAD_IMAGE_V2=1") - endif -endif - -# For AArch32, LOAD_IMAGE_V2 must be enabled. ifeq (${ARCH},aarch32) + # For AArch32, LOAD_IMAGE_V2 must be enabled. ifeq (${LOAD_IMAGE_V2}, 0) $(error "For AArch32, LOAD_IMAGE_V2 must be enabled.") endif + # TRUSTED_BOARD_BOOT is currently not supported for AArch32. + ifeq (${TRUSTED_BOARD_BOOT},1) + $(error "TRUSTED_BOARD_BOOT is currently not supported for AArch32") + endif endif diff --git a/bl1/bl1_fwu.c b/bl1/bl1_fwu.c index f3338051..61f2adb0 100644 --- a/bl1/bl1_fwu.c +++ b/bl1/bl1_fwu.c @@ -121,7 +121,6 @@ static int bl1_fwu_image_copy(unsigned int image_id, unsigned int flags) { uintptr_t base_addr; - meminfo_t *mem_layout; /* Get the image descriptor. */ image_desc_t *image_desc = bl1_plat_get_image_desc(image_id); @@ -208,15 +207,22 @@ static int bl1_fwu_image_copy(unsigned int image_id, WARN("BL1-FWU: Copy arguments source/size not mapped\n"); return -ENOMEM; } - +#if LOAD_IMAGE_V2 + /* Check that the image size to load is within limit */ + if (image_size > image_desc->image_info.image_max_size) { + WARN("BL1-FWU: Image size out of bounds\n"); + return -ENOMEM; + } +#else /* Find out how much free trusted ram remains after BL1 load */ - mem_layout = bl1_plat_sec_mem_layout(); + meminfo_t *mem_layout = bl1_plat_sec_mem_layout(); if ((image_desc->image_info.image_base < mem_layout->free_base) || (image_desc->image_info.image_base + image_size > mem_layout->free_base + mem_layout->free_size)) { WARN("BL1-FWU: Memory not available to copy\n"); return -ENOMEM; } +#endif /* Update the image size. */ image_desc->image_info.image_size = image_size; diff --git a/bl1/tbbr/tbbr_img_desc.c b/bl1/tbbr/tbbr_img_desc.c index 7651f1c0..e3bd574d 100644 --- a/bl1/tbbr/tbbr_img_desc.c +++ b/bl1/tbbr/tbbr_img_desc.c @@ -38,6 +38,9 @@ image_desc_t bl1_tbbr_image_descs[] = { SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY, VERSION_1, image_info_t, 0), .image_info.image_base = BL2_BASE, +#if LOAD_IMAGE_V2 + .image_info.image_max_size = BL2_LIMIT - BL2_BASE, +#endif SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY, VERSION_1, entry_point_info_t, SECURE), }, @@ -55,6 +58,9 @@ image_desc_t bl1_tbbr_image_descs[] = { SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY, VERSION_1, image_info_t, 0), .image_info.image_base = SCP_BL2U_BASE, +#if LOAD_IMAGE_V2 + .image_info.image_max_size = SCP_BL2U_LIMIT - SCP_BL2U_BASE, +#endif SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY, VERSION_1, entry_point_info_t, SECURE), }, @@ -65,6 +71,9 @@ image_desc_t bl1_tbbr_image_descs[] = { SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_1, image_info_t, 0), .image_info.image_base = BL2U_BASE, +#if LOAD_IMAGE_V2 + .image_info.image_max_size = BL2U_LIMIT - BL2U_BASE, +#endif SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_1, entry_point_info_t, SECURE | EXECUTABLE), .ep_info.pc = BL2U_BASE, diff --git a/docs/porting-guide.md b/docs/porting-guide.md index 57f2c40d..a74966c3 100644 --- a/docs/porting-guide.md +++ b/docs/porting-guide.md @@ -443,7 +443,19 @@ constant must also be defined: * **#define : ADDR_SPACE_SIZE** Defines the total size of the address space in bytes. For example, for a 32 - bit address space, this value should be `(1ull << 32)`. + bit address space, this value should be `(1ull << 32)`. This definition is + now deprecated, platforms should use `PLAT_PHY_ADDR_SPACE_SIZE` and + `PLAT_VIRT_ADDR_SPACE_SIZE` instead. + +* **#define : PLAT_VIRT_ADDR_SPACE_SIZE** + + Defines the total size of the virtual address space in bytes. For example, + for a 32 bit virtual address space, this value should be `(1ull << 32)`. + +* **#define : PLAT_PHY_ADDR_SPACE_SIZE** + + Defines the total size of the physical address space in bytes. For example, + for a 32 bit physical address space, this value should be `(1ull << 32)`. If the platform port uses the IO storage framework, the following constants must also be defined: diff --git a/docs/user-guide.md b/docs/user-guide.md index e910790c..056c4145 100644 --- a/docs/user-guide.md +++ b/docs/user-guide.md @@ -1102,7 +1102,7 @@ to load the ELF file over JTAG on Juno. The AArch64 build of this version of ARM Trusted Firmware has been tested on the following ARM FVPs (64-bit host machine only). -* `Foundation_Platform` (Version 10.1, Build 10.1.32) +* `Foundation_Platform` (Version 10.2, Build 10.2.20) * `FVP_Base_AEMv8A-AEMv8A` (Version 7.7, Build 0.8.7701) * `FVP_Base_Cortex-A57x4-A53x4` (Version 7.7, Build 0.8.7701) * `FVP_Base_Cortex-A57x1-A53x1` (Version 7.7, Build 0.8.7701) diff --git a/fdts/fvp-foundation-gicv2-psci.dts b/fdts/fvp-foundation-gicv2-psci.dts index d5c2dfbb..02152902 100644 --- a/fdts/fvp-foundation-gicv2-psci.dts +++ b/fdts/fvp-foundation-gicv2-psci.dts @@ -11,7 +11,7 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * - * Neither the name of the ARM nor the names of its contributors may be used + * Neither the name of ARM nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * diff --git a/fdts/fvp-foundation-motherboard.dtsi b/fdts/fvp-foundation-motherboard.dtsi index 9d29e481..cc4df211 100644 --- a/fdts/fvp-foundation-motherboard.dtsi +++ b/fdts/fvp-foundation-motherboard.dtsi @@ -11,7 +11,7 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * - * Neither the name of the ARM nor the names of its contributors may be used + * Neither the name of ARM nor the names of its contributors may be used * to endorse or promote products derived from this software without specific * prior written permission. * diff --git a/include/drivers/io/io_fip.h b/include/drivers/io/io_fip.h index 90b2fd0b..5d5d5000 100644 --- a/include/drivers/io/io_fip.h +++ b/include/drivers/io/io_fip.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014 ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index a034ae20..989667a7 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -134,6 +134,16 @@ #define ID_AA64PFR0_GIC_WIDTH 4 #define ID_AA64PFR0_GIC_MASK ((1 << ID_AA64PFR0_GIC_WIDTH) - 1) +/* ID_AA64MMFR0_EL1 definitions */ +#define ID_AA64MMFR0_EL1_PARANGE_MASK 0xf + +#define PARANGE_0000 32 +#define PARANGE_0001 36 +#define PARANGE_0010 40 +#define PARANGE_0011 42 +#define PARANGE_0100 44 +#define PARANGE_0101 48 + /* ID_PFR1_EL1 definitions */ #define ID_PFR1_VIRTEXT_SHIFT 12 #define ID_PFR1_VIRTEXT_MASK 0xf diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index a013809b..aa262031 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -196,6 +196,7 @@ void __dead2 smc(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, ******************************************************************************/ DEFINE_SYSREG_READ_FUNC(midr_el1) DEFINE_SYSREG_READ_FUNC(mpidr_el1) +DEFINE_SYSREG_READ_FUNC(id_aa64mmfr0_el1) DEFINE_SYSREG_RW_FUNCS(scr_el3) DEFINE_SYSREG_RW_FUNCS(hcr_el2) diff --git a/include/lib/runtime_instr.h b/include/lib/runtime_instr.h index d4090027..4d05ba4b 100644 --- a/include/lib/runtime_instr.h +++ b/include/lib/runtime_instr.h @@ -31,11 +31,13 @@ #ifndef __RUNTIME_INSTR_H__ #define __RUNTIME_INSTR_H__ -#define RT_INSTR_TOTAL_IDS 4 #define RT_INSTR_ENTER_PSCI 0 #define RT_INSTR_EXIT_PSCI 1 #define RT_INSTR_ENTER_HW_LOW_PWR 2 #define RT_INSTR_EXIT_HW_LOW_PWR 3 +#define RT_INSTR_ENTER_CFLUSH 4 +#define RT_INSTR_EXIT_CFLUSH 5 +#define RT_INSTR_TOTAL_IDS 6 #ifndef __ASSEMBLY__ PMF_DECLARE_CAPTURE_TIMESTAMP(rt_instr_svc) diff --git a/include/lib/xlat_tables.h b/include/lib/xlat_tables.h index 0e9800ab..f4476183 100644 --- a/include/lib/xlat_tables.h +++ b/include/lib/xlat_tables.h @@ -93,6 +93,11 @@ #define L2_XLAT_ADDRESS_SHIFT (L3_XLAT_ADDRESS_SHIFT + XLAT_TABLE_ENTRIES_SHIFT) #define L1_XLAT_ADDRESS_SHIFT (L2_XLAT_ADDRESS_SHIFT + XLAT_TABLE_ENTRIES_SHIFT) #define L0_XLAT_ADDRESS_SHIFT (L1_XLAT_ADDRESS_SHIFT + XLAT_TABLE_ENTRIES_SHIFT) +#define XLAT_ADDR_SHIFT(level) (PAGE_SIZE_SHIFT + \ + ((XLAT_TABLE_LEVEL_MAX - (level)) * XLAT_TABLE_ENTRIES_SHIFT)) + +#define XLAT_BLOCK_SIZE(level) ((u_register_t)1 << XLAT_ADDR_SHIFT(level)) +#define XLAT_BLOCK_MASK(level) (XLAT_BLOCK_SIZE(level) - 1) /* * AP[1] bit is ignored by hardware and is diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index 4a4dfd40..6d7bcd1e 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -205,7 +205,8 @@ * Required platform porting definitions common to all ARM standard platforms *****************************************************************************/ -#define ADDR_SPACE_SIZE (1ull << 32) +#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32) +#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32) /* * This macro defines the deepest retention state possible. A higher state diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h index 173de1b4..a2fe0d58 100644 --- a/include/plat/arm/css/common/css_def.h +++ b/include/plat/arm/css/common/css_def.h @@ -135,8 +135,10 @@ * SCP, it is discarded and BL31 is loaded over the top. */ #define SCP_BL2_BASE BL31_BASE +#define SCP_BL2_LIMIT (SCP_BL2_BASE + PLAT_CSS_MAX_SCP_BL2_SIZE) #define SCP_BL2U_BASE BL31_BASE +#define SCP_BL2U_LIMIT (SCP_BL2U_BASE + PLAT_CSS_MAX_SCP_BL2U_SIZE) #endif /* CSS_LOAD_SCP_IMAGES */ /* Load address of Non-Secure Image for CSS platform ports */ diff --git a/lib/psci/psci_off.c b/lib/psci/psci_off.c index 1cc6ede3..897bf319 100644 --- a/lib/psci/psci_off.c +++ b/lib/psci/psci_off.c @@ -107,12 +107,29 @@ int psci_do_cpu_off(unsigned int end_pwrlvl) psci_stats_update_pwr_down(end_pwrlvl, &state_info); #endif +#if ENABLE_RUNTIME_INSTRUMENTATION + + /* + * Flush cache line so that even if CPU power down happens + * the timestamp update is reflected in memory. + */ + PMF_CAPTURE_TIMESTAMP(rt_instr_svc, + RT_INSTR_ENTER_CFLUSH, + PMF_CACHE_MAINT); +#endif + /* * Arch. management. Perform the necessary steps to flush all * cpu caches. */ psci_do_pwrdown_cache_maintenance(psci_find_max_off_lvl(&state_info)); +#if ENABLE_RUNTIME_INSTRUMENTATION + PMF_CAPTURE_TIMESTAMP(rt_instr_svc, + RT_INSTR_EXIT_CFLUSH, + PMF_NO_CACHE_MAINT); +#endif + /* * Plat. management: Perform platform specific actions to turn this * cpu off e.g. exit cpu coherency, program the power controller etc. diff --git a/lib/psci/psci_suspend.c b/lib/psci/psci_suspend.c index 10d2481d..dc2ab774 100644 --- a/lib/psci/psci_suspend.c +++ b/lib/psci/psci_suspend.c @@ -109,6 +109,17 @@ static void psci_suspend_to_pwrdown_start(unsigned int end_pwrlvl, */ cm_init_my_context(ep); +#if ENABLE_RUNTIME_INSTRUMENTATION + + /* + * Flush cache line so that even if CPU power down happens + * the timestamp update is reflected in memory. + */ + PMF_CAPTURE_TIMESTAMP(rt_instr_svc, + RT_INSTR_ENTER_CFLUSH, + PMF_CACHE_MAINT); +#endif + /* * Arch. management. Perform the necessary steps to flush all * cpu caches. Currently we assume that the power level correspond @@ -117,6 +128,12 @@ static void psci_suspend_to_pwrdown_start(unsigned int end_pwrlvl, * and the cpu-ops power down to perform from the platform. */ psci_do_pwrdown_cache_maintenance(max_off_lvl); + +#if ENABLE_RUNTIME_INSTRUMENTATION + PMF_CAPTURE_TIMESTAMP(rt_instr_svc, + RT_INSTR_EXIT_CFLUSH, + PMF_NO_CACHE_MAINT); +#endif } /******************************************************************************* diff --git a/lib/xlat_tables/aarch32/xlat_tables.c b/lib/xlat_tables/aarch32/xlat_tables.c index d70a6ef5..e8408da8 100644 --- a/lib/xlat_tables/aarch32/xlat_tables.c +++ b/lib/xlat_tables/aarch32/xlat_tables.c @@ -39,49 +39,60 @@ /* * Each platform can define the size of the virtual address space, which is - * defined in ADDR_SPACE_SIZE. TTBCR.TxSZ is calculated as 32 minus the width - * of said address space. The value of TTBCR.TxSZ must be in the range 0 to - * 7 [1], which means that the virtual address space width must be in the range - * 32 to 25 bits. + * defined in PLAT_VIRT_ADDR_SPACE_SIZE. TTBCR.TxSZ is calculated as 32 minus + * the width of said address space. The value of TTBCR.TxSZ must be in the + * range 0 to 7 [1], which means that the virtual address space width must be + * in the range 32 to 25 bits. * - * Here we calculate the initial lookup level from the value of ADDR_SPACE_SIZE. - * For a 4 KB page size, level 1 supports virtual address spaces of widths 32 - * to 31 bits, and level 2 from 30 to 25. Wider or narrower address spaces are - * not supported. As a result, level 3 cannot be used as initial lookup level - * with 4 KB granularity [1]. + * Here we calculate the initial lookup level from the value of + * PLAT_VIRT_ADDR_SPACE_SIZE. For a 4 KB page size, level 1 supports virtual + * address spaces of widths 32 to 31 bits, and level 2 from 30 to 25. Wider or + * narrower address spaces are not supported. As a result, level 3 cannot be + * used as initial lookup level with 4 KB granularity [1]. * - * For example, for a 31-bit address space (i.e. ADDR_SPACE_SIZE == 1 << 31), - * TTBCR.TxSZ will be programmed to (32 - 31) = 1. According to Table G4-5 in - * the ARM ARM, the initial lookup level for such an address space is 1. + * For example, for a 31-bit address space (i.e. PLAT_VIRT_ADDR_SPACE_SIZE == + * 1 << 31), TTBCR.TxSZ will be programmed to (32 - 31) = 1. According to Table + * G4-5 in the ARM ARM, the initial lookup level for an address space like that + * is 1. * * See the ARMv8-A Architecture Reference Manual (DDI 0487A.j) for more * information: * [1] Section G4.6.5 */ -#if ADDR_SPACE_SIZE > (1ULL << (32 - TTBCR_TxSZ_MIN)) +#if PLAT_VIRT_ADDR_SPACE_SIZE > (1ULL << (32 - TTBCR_TxSZ_MIN)) -# error "ADDR_SPACE_SIZE is too big." +# error "PLAT_VIRT_ADDR_SPACE_SIZE is too big." -#elif ADDR_SPACE_SIZE > (1 << L1_XLAT_ADDRESS_SHIFT) +#elif PLAT_VIRT_ADDR_SPACE_SIZE > (1 << L1_XLAT_ADDRESS_SHIFT) # define XLAT_TABLE_LEVEL_BASE 1 -# define NUM_BASE_LEVEL_ENTRIES (ADDR_SPACE_SIZE >> L1_XLAT_ADDRESS_SHIFT) +# define NUM_BASE_LEVEL_ENTRIES \ + (PLAT_VIRT_ADDR_SPACE_SIZE >> L1_XLAT_ADDRESS_SHIFT) -#elif ADDR_SPACE_SIZE >= (1 << (32 - TTBCR_TxSZ_MAX)) +#elif PLAT_VIRT_ADDR_SPACE_SIZE >= (1 << (32 - TTBCR_TxSZ_MAX)) # define XLAT_TABLE_LEVEL_BASE 2 -# define NUM_BASE_LEVEL_ENTRIES (ADDR_SPACE_SIZE >> L2_XLAT_ADDRESS_SHIFT) +# define NUM_BASE_LEVEL_ENTRIES \ + (PLAT_VIRT_ADDR_SPACE_SIZE >> L2_XLAT_ADDRESS_SHIFT) #else -# error "ADDR_SPACE_SIZE is too small." +# error "PLAT_VIRT_ADDR_SPACE_SIZE is too small." #endif static uint64_t base_xlation_table[NUM_BASE_LEVEL_ENTRIES] __aligned(NUM_BASE_LEVEL_ENTRIES * sizeof(uint64_t)); +#if DEBUG +static unsigned long long get_max_supported_pa(void) +{ + /* Physical address space size for long descriptor format. */ + return (1ULL << 40) - 1ULL; +} +#endif + void init_xlat_tables(void) { unsigned long long max_pa; @@ -89,7 +100,10 @@ void init_xlat_tables(void) print_mmap(); init_xlation_table(0, base_xlation_table, XLAT_TABLE_LEVEL_BASE, &max_va, &max_pa); - assert(max_va < ADDR_SPACE_SIZE); + + assert(max_va <= PLAT_VIRT_ADDR_SPACE_SIZE - 1); + assert(max_pa <= PLAT_PHY_ADDR_SPACE_SIZE - 1); + assert((PLAT_PHY_ADDR_SPACE_SIZE - 1) <= get_max_supported_pa()); } /******************************************************************************* @@ -122,7 +136,7 @@ void enable_mmu_secure(unsigned int flags) ttbcr = TTBCR_EAE_BIT | TTBCR_SH0_INNER_SHAREABLE | TTBCR_RGN0_OUTER_WBA | TTBCR_RGN0_INNER_WBA | - (32 - __builtin_ctzl((uintptr_t)ADDR_SPACE_SIZE)); + (32 - __builtin_ctzl((uintptr_t)PLAT_VIRT_ADDR_SPACE_SIZE)); ttbcr |= TTBCR_EPD1_BIT; write_ttbcr(ttbcr); diff --git a/lib/xlat_tables/aarch64/xlat_tables.c b/lib/xlat_tables/aarch64/xlat_tables.c index 5b639b7a..a168636b 100644 --- a/lib/xlat_tables/aarch64/xlat_tables.c +++ b/lib/xlat_tables/aarch64/xlat_tables.c @@ -31,28 +31,33 @@ #include <arch.h> #include <arch_helpers.h> #include <assert.h> +#include <bl_common.h> #include <cassert.h> +#include <common_def.h> #include <platform_def.h> +#include <sys/types.h> #include <utils.h> #include <xlat_tables.h> #include "../xlat_tables_private.h" /* * Each platform can define the size of the virtual address space, which is - * defined in ADDR_SPACE_SIZE. TCR.TxSZ is calculated as 64 minus the width of - * said address space. The value of TCR.TxSZ must be in the range 16 to 39 [1], - * which means that the virtual address space width must be in the range 48 to - * 25 bits. + * defined in PLAT_VIRT_ADDR_SPACE_SIZE. TCR.TxSZ is calculated as 64 minus the + * width of said address space. The value of TCR.TxSZ must be in the range 16 + * to 39 [1], which means that the virtual address space width must be in the + * range 48 to 25 bits. * - * Here we calculate the initial lookup level from the value of ADDR_SPACE_SIZE. - * For a 4 KB page size, level 0 supports virtual address spaces of widths 48 to - * 40 bits, level 1 from 39 to 31, and level 2 from 30 to 25. Wider or narrower - * address spaces are not supported. As a result, level 3 cannot be used as - * initial lookup level with 4 KB granularity. [2] + * Here we calculate the initial lookup level from the value of + * PLAT_VIRT_ADDR_SPACE_SIZE. For a 4 KB page size, level 0 supports virtual + * address spaces of widths 48 to 40 bits, level 1 from 39 to 31, and level 2 + * from 30 to 25. Wider or narrower address spaces are not supported. As a + * result, level 3 cannot be used as initial lookup level with 4 KB + * granularity. [2] * - * For example, for a 35-bit address space (i.e. ADDR_SPACE_SIZE == 1 << 35), - * TCR.TxSZ will be programmed to (64 - 35) = 29. According to Table D4-11 in - * the ARM ARM, the initial lookup level for such an address space is 1. + * For example, for a 35-bit address space (i.e. PLAT_VIRT_ADDR_SPACE_SIZE == + * 1 << 35), TCR.TxSZ will be programmed to (64 - 35) = 29. According to Table + * D4-11 in the ARM ARM, the initial lookup level for an address space like + * that is 1. * * See the ARMv8-A Architecture Reference Manual (DDI 0487A.j) for more * information: @@ -60,28 +65,31 @@ * [2] Section D4.2.5 */ -#if ADDR_SPACE_SIZE > (1ULL << (64 - TCR_TxSZ_MIN)) +#if PLAT_VIRT_ADDR_SPACE_SIZE > (1ULL << (64 - TCR_TxSZ_MIN)) -# error "ADDR_SPACE_SIZE is too big." +# error "PLAT_VIRT_ADDR_SPACE_SIZE is too big." -#elif ADDR_SPACE_SIZE > (1ULL << L0_XLAT_ADDRESS_SHIFT) +#elif PLAT_VIRT_ADDR_SPACE_SIZE > (1ULL << L0_XLAT_ADDRESS_SHIFT) # define XLAT_TABLE_LEVEL_BASE 0 -# define NUM_BASE_LEVEL_ENTRIES (ADDR_SPACE_SIZE >> L0_XLAT_ADDRESS_SHIFT) +# define NUM_BASE_LEVEL_ENTRIES \ + (PLAT_VIRT_ADDR_SPACE_SIZE >> L0_XLAT_ADDRESS_SHIFT) -#elif ADDR_SPACE_SIZE > (1 << L1_XLAT_ADDRESS_SHIFT) +#elif PLAT_VIRT_ADDR_SPACE_SIZE > (1 << L1_XLAT_ADDRESS_SHIFT) # define XLAT_TABLE_LEVEL_BASE 1 -# define NUM_BASE_LEVEL_ENTRIES (ADDR_SPACE_SIZE >> L1_XLAT_ADDRESS_SHIFT) +# define NUM_BASE_LEVEL_ENTRIES \ + (PLAT_VIRT_ADDR_SPACE_SIZE >> L1_XLAT_ADDRESS_SHIFT) -#elif ADDR_SPACE_SIZE >= (1 << (64 - TCR_TxSZ_MAX)) +#elif PLAT_VIRT_ADDR_SPACE_SIZE >= (1 << (64 - TCR_TxSZ_MAX)) # define XLAT_TABLE_LEVEL_BASE 2 -# define NUM_BASE_LEVEL_ENTRIES (ADDR_SPACE_SIZE >> L2_XLAT_ADDRESS_SHIFT) +# define NUM_BASE_LEVEL_ENTRIES \ + (PLAT_VIRT_ADDR_SPACE_SIZE >> L2_XLAT_ADDRESS_SHIFT) #else -# error "ADDR_SPACE_SIZE is too small." +# error "PLAT_VIRT_ADDR_SPACE_SIZE is too small." #endif @@ -119,6 +127,25 @@ static unsigned long long calc_physical_addr_size_bits( return TCR_PS_BITS_4GB; } +#if DEBUG +/* Physical Address ranges supported in the AArch64 Memory Model */ +static const unsigned int pa_range_bits_arr[] = { + PARANGE_0000, PARANGE_0001, PARANGE_0010, PARANGE_0011, PARANGE_0100, + PARANGE_0101 +}; + +static unsigned long long get_max_supported_pa(void) +{ + u_register_t pa_range = read_id_aa64mmfr0_el1() & + ID_AA64MMFR0_EL1_PARANGE_MASK; + + /* All other values are reserved */ + assert(pa_range < ARRAY_SIZE(pa_range_bits_arr)); + + return (1ULL << pa_range_bits_arr[pa_range]) - 1ULL; +} +#endif + void init_xlat_tables(void) { unsigned long long max_pa; @@ -126,8 +153,12 @@ void init_xlat_tables(void) print_mmap(); init_xlation_table(0, base_xlation_table, XLAT_TABLE_LEVEL_BASE, &max_va, &max_pa); + + assert(max_va <= PLAT_VIRT_ADDR_SPACE_SIZE - 1); + assert(max_pa <= PLAT_PHY_ADDR_SPACE_SIZE - 1); + assert((PLAT_PHY_ADDR_SPACE_SIZE - 1) <= get_max_supported_pa()); + tcr_ps_bits = calc_physical_addr_size_bits(max_pa); - assert(max_va < ADDR_SPACE_SIZE); } /******************************************************************************* @@ -165,7 +196,7 @@ void init_xlat_tables(void) /* Set T0SZ to (64 - width of virtual address space) */ \ tcr = TCR_SH_INNER_SHAREABLE | TCR_RGN_OUTER_WBA | \ TCR_RGN_INNER_WBA | \ - (64 - __builtin_ctzl(ADDR_SPACE_SIZE)); \ + (64 - __builtin_ctzl(PLAT_VIRT_ADDR_SPACE_SIZE));\ tcr |= _tcr_extra; \ write_tcr_el##_el(tcr); \ \ diff --git a/lib/xlat_tables/xlat_tables_common.c b/lib/xlat_tables/xlat_tables_common.c index ebbc9161..81c4dc68 100644 --- a/lib/xlat_tables/xlat_tables_common.c +++ b/lib/xlat_tables/xlat_tables_common.c @@ -32,12 +32,14 @@ #include <arch_helpers.h> #include <assert.h> #include <cassert.h> +#include <common_def.h> #include <debug.h> #include <platform_def.h> #include <string.h> #include <types.h> #include <utils.h> #include <xlat_tables.h> +#include "xlat_tables_private.h" #if LOG_LEVEL >= LOG_LEVEL_VERBOSE #define LVL0_SPACER "" @@ -102,6 +104,11 @@ void mmap_add_region(unsigned long long base_pa, uintptr_t base_va, assert(base_pa < end_pa); /* Check for overflows */ assert(base_va < end_va); + assert((base_va + (uintptr_t)size - (uintptr_t)1) <= + (PLAT_VIRT_ADDR_SPACE_SIZE - 1)); + assert((base_pa + (unsigned long long)size - 1ULL) <= + (PLAT_PHY_ADDR_SPACE_SIZE - 1)); + #if DEBUG /* Check for PAs and VAs overlaps with all other regions */ @@ -198,6 +205,9 @@ static uint64_t mmap_desc(unsigned attr, unsigned long long addr_pa, uint64_t desc; int mem_type; + /* Make sure that the granularity is fine enough to map this address. */ + assert((addr_pa & XLAT_BLOCK_MASK(level)) == 0); + desc = addr_pa; /* * There are different translation table descriptors for level 3 and the @@ -343,7 +353,8 @@ static mmap_region_t *init_xlation_table_inner(mmap_region_t *mm, if (mm->base_va > base_va + level_size - 1) { /* Next region is after this area. Nothing to map yet */ desc = INVALID_DESC; - } else { + /* Make sure that the current level allows block descriptors */ + } else if (level >= XLAT_BLOCK_LEVEL_MIN) { /* * Try to get attributes of this area. It will fail if * there are partially overlapping regions. On success, @@ -372,7 +383,8 @@ static mmap_region_t *init_xlation_table_inner(mmap_region_t *mm, *table++ = desc; base_va += level_size; - } while ((base_va & level_index_mask) && (base_va - 1 < ADDR_SPACE_SIZE - 1)); + } while ((base_va & level_index_mask) && + (base_va - 1 < PLAT_VIRT_ADDR_SPACE_SIZE - 1)); return mm; } diff --git a/lib/xlat_tables/xlat_tables_private.h b/lib/xlat_tables/xlat_tables_private.h index 159d071b..f0f656bd 100644 --- a/lib/xlat_tables/xlat_tables_private.h +++ b/lib/xlat_tables/xlat_tables_private.h @@ -32,10 +32,61 @@ #define __XLAT_TABLES_PRIVATE_H__ #include <cassert.h> +#include <platform_def.h> #include <utils.h> -/* The virtual address space size must be a power of two. */ -CASSERT(IS_POWER_OF_TWO(ADDR_SPACE_SIZE), assert_valid_addr_space_size); +/* + * If the platform hasn't defined a physical and a virtual address space size + * default to ADDR_SPACE_SIZE. + */ +#if ERROR_DEPRECATED +# ifdef ADDR_SPACE_SIZE +# error "ADDR_SPACE_SIZE is deprecated. Use PLAT_xxx_ADDR_SPACE_SIZE instead." +# endif +#elif defined(ADDR_SPACE_SIZE) +# ifndef PLAT_PHY_ADDR_SPACE_SIZE +# define PLAT_PHY_ADDR_SPACE_SIZE ADDR_SPACE_SIZE +# endif +# ifndef PLAT_VIRT_ADDR_SPACE_SIZE +# define PLAT_VIRT_ADDR_SPACE_SIZE ADDR_SPACE_SIZE +# endif +#endif + +/* The virtual and physical address space sizes must be powers of two. */ +CASSERT(IS_POWER_OF_TWO(PLAT_VIRT_ADDR_SPACE_SIZE), + assert_valid_virt_addr_space_size); +CASSERT(IS_POWER_OF_TWO(PLAT_PHY_ADDR_SPACE_SIZE), + assert_valid_phy_addr_space_size); + +/* + * In AArch32 state, the MMU only supports 4KB page granularity, which means + * that the first translation table level is either 1 or 2. Both of them are + * allowed to have block and table descriptors. See section G4.5.6 of the + * ARMv8-A Architecture Reference Manual (DDI 0487A.k) for more information. + * + * In AArch64 state, the MMU may support 4 KB, 16 KB and 64 KB page + * granularity. For 4KB granularity, a level 0 table descriptor doesn't support + * block translation. For 16KB, the same thing happens to levels 0 and 1. For + * 64KB, same for level 1. See section D4.3.1 of the ARMv8-A Architecture + * Reference Manual (DDI 0487A.k) for more information. + * + * The define below specifies the first table level that allows block + * descriptors. + */ + +#ifdef AARCH32 + +# define XLAT_BLOCK_LEVEL_MIN 1 + +#else /* if AArch64 */ + +# if PAGE_SIZE == (4*1024) /* 4KB */ +# define XLAT_BLOCK_LEVEL_MIN 1 +# else /* 16KB or 64KB */ +# define XLAT_BLOCK_LEVEL_MIN 2 +# endif + +#endif /* AARCH32 */ void print_mmap(void); void init_xlation_table(uintptr_t base_va, uint64_t *table, diff --git a/make_helpers/build_env.mk b/make_helpers/build_env.mk index 62c7f681..74a292ef 100644 --- a/make_helpers/build_env.mk +++ b/make_helpers/build_env.mk @@ -1,31 +1,31 @@ # -# Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: # -# Redistributions of source code must retain the above copyright notice, this -# list of conditions and the following disclaimer. +# Redistributions of source code must retain the above copyright notice, this +# list of conditions and the following disclaimer. # -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation -# and/or other materials provided with the distribution. +# Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. # -# Neither the name of ARM nor the names of its contributors may be used -# to endorse or promote products derived from this software without specific -# prior written permission. +# Neither the name of ARM nor the names of its contributors may be used +# to endorse or promote products derived from this software without specific +# prior written permission. # -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. # # This file contains the logic to identify and include any relevant diff --git a/plat/arm/board/juno/include/platform_def.h b/plat/arm/board/juno/include/platform_def.h index 691e2f77..adc4704d 100644 --- a/plat/arm/board/juno/include/platform_def.h +++ b/plat/arm/board/juno/include/platform_def.h @@ -191,6 +191,12 @@ #define PLAT_CSS_MAX_SCP_BL2_SIZE 0x1D000 /* + * PLAT_CSS_MAX_SCP_BL2U_SIZE is calculated using the current + * SCP_BL2U size plus a little space for growth. + */ +#define PLAT_CSS_MAX_SCP_BL2U_SIZE 0x1D000 + +/* * Define a list of Group 1 Secure and Group 0 interrupts as per GICv3 * terminology. On a GICv2 system or mode, the lists will be merged and treated * as Group 0 interrupts. diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk index 9b078ce0..c2f28f98 100644 --- a/plat/arm/common/arm_common.mk +++ b/plat/arm/common/arm_common.mk @@ -97,6 +97,8 @@ ENABLE_PSCI_STAT := 1 # mapping the former as executable and the latter as execute-never. SEPARATE_CODE_AND_RODATA := 1 +# Enable new version of image loading on ARM platforms +LOAD_IMAGE_V2 := 1 PLAT_INCLUDES += -Iinclude/common/tbbr \ -Iinclude/plat/arm/common diff --git a/plat/rockchip/common/drivers/pmu/pmu_com.h b/plat/rockchip/common/drivers/pmu/pmu_com.h index a6d3186f..45ba0612 100644 --- a/plat/rockchip/common/drivers/pmu/pmu_com.h +++ b/plat/rockchip/common/drivers/pmu/pmu_com.h @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/common/include/rockchip_sip_svc.h b/plat/rockchip/common/include/rockchip_sip_svc.h index 9e31082a..413b6d1a 100644 --- a/plat/rockchip/common/include/rockchip_sip_svc.h +++ b/plat/rockchip/common/include/rockchip_sip_svc.h @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/common/pmusram/pmu_sram.c b/plat/rockchip/common/pmusram/pmu_sram.c index 5c6a6e65..120220ae 100644 --- a/plat/rockchip/common/pmusram/pmu_sram.c +++ b/plat/rockchip/common/pmusram/pmu_sram.c @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/common/pmusram/pmu_sram.h b/plat/rockchip/common/pmusram/pmu_sram.h index ec2d3416..ce9b1b69 100644 --- a/plat/rockchip/common/pmusram/pmu_sram.h +++ b/plat/rockchip/common/pmusram/pmu_sram.h @@ -1,4 +1,5 @@ -/* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. +/* + * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -10,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S b/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S index 9f94b0c1..3d6c65aa 100644 --- a/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S +++ b/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/common/rockchip_sip_svc.c b/plat/rockchip/common/rockchip_sip_svc.c index cbc91057..52e8cd70 100644 --- a/plat/rockchip/common/rockchip_sip_svc.c +++ b/plat/rockchip/common/rockchip_sip_svc.c @@ -4,13 +4,17 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. * - * 2. Redistributions in binary form must reproduce the above copyright notice, + * Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c b/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c index cb89575c..3b72beea 100644 --- a/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c +++ b/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.c @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.h b/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.h index c9d6c25f..7e74278b 100644 --- a/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.h +++ b/plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.h @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3368/drivers/pmu/plat_pmu_macros.S b/plat/rockchip/rk3368/drivers/pmu/plat_pmu_macros.S index 5fd3c41e..a8a33c42 100644 --- a/plat/rockchip/rk3368/drivers/pmu/plat_pmu_macros.S +++ b/plat/rockchip/rk3368/drivers/pmu/plat_pmu_macros.S @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3368/drivers/pmu/pmu.c b/plat/rockchip/rk3368/drivers/pmu/pmu.c index fc44a4c8..f44e7cf9 100644 --- a/plat/rockchip/rk3368/drivers/pmu/pmu.c +++ b/plat/rockchip/rk3368/drivers/pmu/pmu.c @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3368/drivers/pmu/pmu.h b/plat/rockchip/rk3368/drivers/pmu/pmu.h index 2cf60fdd..37137212 100644 --- a/plat/rockchip/rk3368/drivers/pmu/pmu.h +++ b/plat/rockchip/rk3368/drivers/pmu/pmu.h @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3368/drivers/soc/soc.c b/plat/rockchip/rk3368/drivers/soc/soc.c index 36308289..601f4383 100644 --- a/plat/rockchip/rk3368/drivers/soc/soc.c +++ b/plat/rockchip/rk3368/drivers/soc/soc.c @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3368/drivers/soc/soc.h b/plat/rockchip/rk3368/drivers/soc/soc.h index 6e2c3fe2..f0a892ca 100644 --- a/plat/rockchip/rk3368/drivers/soc/soc.h +++ b/plat/rockchip/rk3368/drivers/soc/soc.h @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3368/include/plat_sip_calls.h b/plat/rockchip/rk3368/include/plat_sip_calls.h index a778f491..565e9802 100644 --- a/plat/rockchip/rk3368/include/plat_sip_calls.h +++ b/plat/rockchip/rk3368/include/plat_sip_calls.h @@ -4,13 +4,17 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. * - * 2. Redistributions in binary form must reproduce the above copyright notice, + * Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3368/plat_sip_calls.c b/plat/rockchip/rk3368/plat_sip_calls.c index 3d2f39a7..42887563 100644 --- a/plat/rockchip/rk3368/plat_sip_calls.c +++ b/plat/rockchip/rk3368/plat_sip_calls.c @@ -4,13 +4,17 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. * - * 2. Redistributions in binary form must reproduce the above copyright notice, + * Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S b/plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S index e0f9bfc1..6e06b941 100644 --- a/plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S +++ b/plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S @@ -11,6 +11,10 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3399/include/plat_sip_calls.h b/plat/rockchip/rk3399/include/plat_sip_calls.h index a778f491..565e9802 100644 --- a/plat/rockchip/rk3399/include/plat_sip_calls.h +++ b/plat/rockchip/rk3399/include/plat_sip_calls.h @@ -4,13 +4,17 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. * - * 2. Redistributions in binary form must reproduce the above copyright notice, + * Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/rockchip/rk3399/plat_sip_calls.c b/plat/rockchip/rk3399/plat_sip_calls.c index dfda6da9..6f5a4bdf 100644 --- a/plat/rockchip/rk3399/plat_sip_calls.c +++ b/plat/rockchip/rk3399/plat_sip_calls.c @@ -4,13 +4,17 @@ * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. * - * 2. Redistributions in binary form must reproduce the above copyright notice, + * Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE diff --git a/plat/xilinx/zynqmp/platform.mk b/plat/xilinx/zynqmp/platform.mk index 33c55a05..588ba612 100644 --- a/plat/xilinx/zynqmp/platform.mk +++ b/plat/xilinx/zynqmp/platform.mk @@ -1,3 +1,4 @@ +# # Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. # # Redistribution and use in source and binary forms, with or without diff --git a/plat/xilinx/zynqmp/tsp/tsp-zynqmp.mk b/plat/xilinx/zynqmp/tsp/tsp-zynqmp.mk index a9ebe602..f58aeb39 100644 --- a/plat/xilinx/zynqmp/tsp/tsp-zynqmp.mk +++ b/plat/xilinx/zynqmp/tsp/tsp-zynqmp.mk @@ -1,3 +1,4 @@ +# # Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. # # Redistribution and use in source and binary forms, with or without |