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-rw-r--r--drivers/arm/tzc/tzc400.c4
-rw-r--r--drivers/arm/tzc/tzc_common_private.h35
-rw-r--r--drivers/arm/tzc/tzc_dmc500.c2
-rw-r--r--lib/compiler-rt/builtins/int_lib.h13
-rw-r--r--lib/compiler-rt/builtins/lshrdi3.c45
-rw-r--r--lib/compiler-rt/compiler-rt.mk3
6 files changed, 57 insertions, 45 deletions
diff --git a/drivers/arm/tzc/tzc400.c b/drivers/arm/tzc/tzc400.c
index 763eba73..d27b0102 100644
--- a/drivers/arm/tzc/tzc400.c
+++ b/drivers/arm/tzc/tzc400.c
@@ -182,8 +182,8 @@ void tzc400_configure_region(unsigned int filters,
* Do address range check based on TZC configuration. A 64bit address is
* the max and expected case.
*/
- assert(((region_top <= _tzc_get_max_top_addr(tzc400.addr_width)) &&
- (region_base < region_top)));
+ assert((region_top <= (UINT64_MAX >> (64U - tzc400.addr_width))) &&
+ (region_base < region_top));
/* region_base and (region_top + 1) must be 4KB aligned */
assert(((region_base | (region_top + 1U)) & (4096U - 1U)) == 0U);
diff --git a/drivers/arm/tzc/tzc_common_private.h b/drivers/arm/tzc/tzc_common_private.h
index 5fbea92b..efac8507 100644
--- a/drivers/arm/tzc/tzc_common_private.h
+++ b/drivers/arm/tzc/tzc_common_private.h
@@ -180,39 +180,4 @@ static inline unsigned int _tzc_read_peripheral_id(uintptr_t base)
return id;
}
-#if ENABLE_ASSERTIONS
-#ifdef AARCH32
-static inline unsigned long long _tzc_get_max_top_addr(unsigned int addr_width)
-{
- /*
- * Assume at least 32 bit wide address and initialize the max.
- * This function doesn't use 64-bit integer arithmetic to avoid
- * having to implement additional compiler library functions.
- */
- unsigned long long addr_mask = 0xFFFFFFFFU;
- uint32_t *addr_ptr = (uint32_t *)&addr_mask;
-
- assert(addr_width >= 32U);
-
- /* This logic works only on little - endian platforms */
- assert((read_sctlr() & SCTLR_EE_BIT) == 0U);
-
- /*
- * If required address width is greater than 32, populate the higher
- * 32 bits of the 64 bit field with the max address.
- */
- if (addr_width > 32U)
- *(addr_ptr + 1U) = ((1U << (addr_width - 32U)) - 1U);
-
- return addr_mask;
-}
-#else
-static inline unsigned long long _tzc_get_max_top_addr(unsigned int addr_width)
-{
- return UINT64_MAX >> (64U - addr_width);
-}
-#endif /* AARCH32 */
-
-#endif /* ENABLE_ASSERTIONS */
-
#endif /* TZC_COMMON_PRIVATE_H */
diff --git a/drivers/arm/tzc/tzc_dmc500.c b/drivers/arm/tzc/tzc_dmc500.c
index 3e6c7838..f0aba9c1 100644
--- a/drivers/arm/tzc/tzc_dmc500.c
+++ b/drivers/arm/tzc/tzc_dmc500.c
@@ -188,7 +188,7 @@ void tzc_dmc500_configure_region(unsigned int region_no,
* Do address range check based on DMC-TZ configuration. A 43bit address
* is the max and expected case.
*/
- assert(((region_top <= _tzc_get_max_top_addr(43)) &&
+ assert(((region_top <= (UINT64_MAX >> (64U - 43U))) &&
(region_base < region_top)));
/* region_base and (region_top + 1) must be 4KB aligned */
diff --git a/lib/compiler-rt/builtins/int_lib.h b/lib/compiler-rt/builtins/int_lib.h
index 787777a1..80a7c41a 100644
--- a/lib/compiler-rt/builtins/int_lib.h
+++ b/lib/compiler-rt/builtins/int_lib.h
@@ -27,27 +27,28 @@
#if defined(__ELF__)
#define FNALIAS(alias_name, original_name) \
- void alias_name() __attribute__((alias(#original_name)))
+ void alias_name() __attribute__((__alias__(#original_name)))
+#define COMPILER_RT_ALIAS(aliasee) __attribute__((__alias__(#aliasee)))
#else
#define FNALIAS(alias, name) _Pragma("GCC error(\"alias unsupported on this file format\")")
+#define COMPILER_RT_ALIAS(aliasee) _Pragma("GCC error(\"alias unsupported on this file format\")")
#endif
/* ABI macro definitions */
#if __ARM_EABI__
-# define ARM_EABI_FNALIAS(aeabi_name, name) \
- void __aeabi_##aeabi_name() __attribute__((alias("__" #name)));
# ifdef COMPILER_RT_ARMHF_TARGET
# define COMPILER_RT_ABI
# else
-# define COMPILER_RT_ABI __attribute__((pcs("aapcs")))
+# define COMPILER_RT_ABI __attribute__((__pcs__("aapcs")))
# endif
#else
-# define ARM_EABI_FNALIAS(aeabi_name, name)
# define COMPILER_RT_ABI
#endif
-#ifdef _MSC_VER
+#define AEABI_RTABI __attribute__((__pcs__("aapcs")))
+
+#if defined(_MSC_VER) && !defined(__clang__)
#define ALWAYS_INLINE __forceinline
#define NOINLINE __declspec(noinline)
#define NORETURN __declspec(noreturn)
diff --git a/lib/compiler-rt/builtins/lshrdi3.c b/lib/compiler-rt/builtins/lshrdi3.c
new file mode 100644
index 00000000..67b2a766
--- /dev/null
+++ b/lib/compiler-rt/builtins/lshrdi3.c
@@ -0,0 +1,45 @@
+/* ===-- lshrdi3.c - Implement __lshrdi3 -----------------------------------===
+ *
+ * The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file implements __lshrdi3 for the compiler_rt library.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#include "int_lib.h"
+
+/* Returns: logical a >> b */
+
+/* Precondition: 0 <= b < bits_in_dword */
+
+COMPILER_RT_ABI di_int
+__lshrdi3(di_int a, si_int b)
+{
+ const int bits_in_word = (int)(sizeof(si_int) * CHAR_BIT);
+ udwords input;
+ udwords result;
+ input.all = a;
+ if (b & bits_in_word) /* bits_in_word <= b < bits_in_dword */
+ {
+ result.s.high = 0;
+ result.s.low = input.s.high >> (b - bits_in_word);
+ }
+ else /* 0 <= b < bits_in_word */
+ {
+ if (b == 0)
+ return a;
+ result.s.high = input.s.high >> b;
+ result.s.low = (input.s.high << (bits_in_word - b)) | (input.s.low >> b);
+ }
+ return result.all;
+}
+
+#if defined(__ARM_EABI__)
+AEABI_RTABI di_int __aeabi_llsr(di_int a, si_int b) COMPILER_RT_ALIAS(__lshrdi3);
+#endif
diff --git a/lib/compiler-rt/compiler-rt.mk b/lib/compiler-rt/compiler-rt.mk
index cb5ab31c..49e497eb 100644
--- a/lib/compiler-rt/compiler-rt.mk
+++ b/lib/compiler-rt/compiler-rt.mk
@@ -31,5 +31,6 @@
ifeq (${ARCH},aarch32)
COMPILER_RT_SRCS := lib/compiler-rt/builtins/arm/aeabi_uldivmod.S \
lib/compiler-rt/builtins/udivmoddi4.c \
- lib/compiler-rt/builtins/ctzdi2.c
+ lib/compiler-rt/builtins/ctzdi2.c \
+ lib/compiler-rt/builtins/lshrdi3.c
endif